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Message-ID: <20211210170113.30063-1-flora.fu@mediatek.com>
Date: Sat, 11 Dec 2021 01:01:05 +0800
From: Flora Fu <flora.fu@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>,
Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
CC: <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
Flora Fu <flora.fu@...iatek.com>,
Yong Wu <yong.wu@...iatek.com>, JB Tsai <jb.tsai@...iatek.com>,
Pi-Cheng Chen <pi-cheng.chen@...iatek.com>,
Chun-Jie Chen <chun-jie.chen@...iatek.com>
Subject: [PATCH v4 0/8] Add Support for MediaTek MT8192 APU Power Domain
The MediaTek AI Processing Unit (APU) is a proprietary hardware
in the SoC to support AI operations.
The series is to create apusys in the SoC folder for developing
the related drivers. Add the apu clocks, basic apu nodes and the
power domain to provide the power controller of APU subsystem.
This series is based on MT8192 power domain[1], PWRAP[2]
and PMIC MT6359[3] patches.
[1] https://patchwork.kernel.org/patch/12456165
[2] https://patchwork.kernel.org/patch/12134935
[3] https://patchwork.kernel.org/patch/12140237
Change notes:
v3->v4:
1) Rebase to 5.16-rc1
2) Update mtk-apu-pm driver to be a module or a buildin driver.
3) Fix coding defects and typo in mtk-apu-pm.c and update
copyright in dt-bindins.
4) Split the mt8192 EVB device tree "mt8192-evb.dts" to a new patch
file in the series.
v2->v3:
1) Rebase to 5.15-rc1
2) remove the apu-mbox registers from syscon.
3) update mtk-apu-pm to fix clock flow and move power status bit into
platform data to support different hardware settings.
v1->v2:
1) update expression "s/_/-/" in dt-bindings documents.
2) drop apu power domain header file for mt8192.
v1: https://patchwork.kernel.org/project/linux-mediatek/list/?series=461999
Flora Fu (8):
dt-bindings: clock: Add MT8192 APU clock bindings
clk: mediatek: mt8192: Add APU clocks support
dt-bindings: arm: mediatek: Add new document bindings for APU
dt-bindings: soc: mediatek: apusys: Add new document for APU power
domain
soc: mediatek: apu: Add apusys and add apu power domain driver
arm64: dts: mt8192: Add APU node
arm64: dts: mt8192: Add APU power domain node
arm64: dts: mt8192: Set up apu power domain regulators
.../arm/mediatek/mediatek,apusys.yaml | 50 ++
.../soc/mediatek/mediatek,apu-pm.yaml | 144 ++++
arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 7 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 39 +
drivers/clk/mediatek/clk-mt8192.c | 91 +++
drivers/soc/mediatek/Kconfig | 12 +
drivers/soc/mediatek/Makefile | 1 +
drivers/soc/mediatek/apusys/Kconfig | 14 +
drivers/soc/mediatek/apusys/Makefile | 2 +
drivers/soc/mediatek/apusys/mtk-apu-pm.c | 727 ++++++++++++++++++
include/dt-bindings/clock/mt8192-clk.h | 14 +-
11 files changed, 1099 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,apusys.yaml
create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,apu-pm.yaml
create mode 100644 drivers/soc/mediatek/apusys/Kconfig
create mode 100644 drivers/soc/mediatek/apusys/Makefile
create mode 100644 drivers/soc/mediatek/apusys/mtk-apu-pm.c
--
2.18.0
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