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Message-ID: <20211210170113.30063-7-flora.fu@mediatek.com>
Date:   Sat, 11 Dec 2021 01:01:11 +0800
From:   Flora Fu <flora.fu@...iatek.com>
To:     Matthias Brugger <matthias.bgg@...il.com>,
        Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>
CC:     <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        Flora Fu <flora.fu@...iatek.com>,
        Yong Wu <yong.wu@...iatek.com>, JB Tsai <jb.tsai@...iatek.com>,
        Pi-Cheng Chen <pi-cheng.chen@...iatek.com>,
        Chun-Jie Chen <chun-jie.chen@...iatek.com>
Subject: [PATCH v4 6/8] arm64: dts: mt8192: Add APU node

Add APU node to MT8192.

Signed-off-by: Flora Fu <flora.fu@...iatek.com>

---
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index ed4a5749c45a..9e4057d4e1ac 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -906,6 +906,18 @@
 			#clock-cells = <1>;
 		};
 
+		apu_conn: apu_conn@...20000 {
+			compatible = "mediatek,mt8192-apu-conn", "syscon";
+			reg = <0 0x19020000 0 0x1000>;
+			#clock-cells = <1>;
+		};
+
+		apu_vcore: apu_vcore@...29000 {
+			compatible = "mediatek,mt8192-apu-vcore", "syscon";
+			reg = <0 0x19029000 0 0x1000>;
+			#clock-cells = <1>;
+		};
+
 		camsys: clock-controller@...00000 {
 			compatible = "mediatek,mt8192-camsys";
 			reg = <0 0x1a000000 0 0x1000>;
-- 
2.18.0

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