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Message-ID: <20211210173743.30906-6-flora.fu@mediatek.com>
Date: Sat, 11 Dec 2021 01:37:42 +0800
From: Flora Fu <flora.fu@...iatek.com>
To: Matthias Brugger <matthias.bgg@...il.com>,
Pi-Cheng Chen <pi-cheng.chen@...iatek.com>
CC: <linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, Flora Fu <flora.fu@...iatek.com>,
Yong Wu <yong.wu@...iatek.com>, JB Tsai <jb.tsai@...iatek.com>,
Chun-Jie Chen <chun-jie.chen@...iatek.com>
Subject: [PATCH 5/6] arm64: dts: mt8195: Add APU power domain node
Add APU power domain node to MT8195.
Signed-off-by: Flora Fu <flora.fu@...iatek.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 828ac8a6b95f..6e60c4a38495 100644
--- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
@@ -1375,6 +1375,22 @@
reg = <0 0x19029000 0 0x1000>;
};
+ apuspm: power-domain@...f0000 {
+ compatible = "mediatek,mt8195-apu-pm", "syscon";
+ reg = <0 0x190f0000 0 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #power-domain-cells = <1>;
+ mediatek,scpsys = <&scpsys>;
+ mediatek,apu-conn = <&apu_conn>;
+ mediatek,apu-conn1 = <&apu_conn1>;
+ mediatek,apu-vcore = <&apu_vcore>;
+ apu_top: power-domain@0 {
+ reg = <0>;
+ #power-domain-cells = <0>;
+ };
+ };
+
apusys_pll: clock-controller@...f3000 {
compatible = "mediatek,mt8195-apusys_pll";
reg = <0 0x190f3000 0 0x1000>;
--
2.18.0
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