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Date:   Sun, 12 Dec 2021 16:23:44 +0900
From:   Hector Martin <marcan@...can.st>
To:     Marc Zyngier <maz@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Cc:     Mark Rutland <mark.rutland@....com>, Will Deacon <will@...nel.org>,
        Sven Peter <sven@...npeter.dev>,
        Alyssa Rosenzweig <alyssa@...enzweig.io>,
        Rob Herring <robh+dt@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Dougall <dougallj@...il.com>, kernel-team@...roid.com
Subject: Re: [PATCH v2 5/8] irqchip/apple-aic: Move PMU-specific registers to
 their own include file

On 01/12/2021 22.49, Marc Zyngier wrote:
> As we are about to have a PMU driver, move the PMU bits from the AIC
> driver into a common include file.
> 
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> ---
>   arch/arm64/include/asm/apple_m1_pmu.h | 19 +++++++++++++++++++
>   drivers/irqchip/irq-apple-aic.c       | 11 +----------
>   2 files changed, 20 insertions(+), 10 deletions(-)
>   create mode 100644 arch/arm64/include/asm/apple_m1_pmu.h
> 
> diff --git a/arch/arm64/include/asm/apple_m1_pmu.h b/arch/arm64/include/asm/apple_m1_pmu.h
> new file mode 100644
> index 000000000000..b848af7faadc
> --- /dev/null
> +++ b/arch/arm64/include/asm/apple_m1_pmu.h
> @@ -0,0 +1,19 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +#ifndef __ASM_APPLE_M1_PMU_h
> +#define __ASM_APPLE_M1_PMU_h
> +
> +#include <linux/bits.h>
> +#include <asm/sysreg.h>
> +
> +/* Core PMC control register */
> +#define SYS_IMP_APL_PMCR0_EL1	sys_reg(3, 1, 15, 0, 0)
> +#define PMCR0_IMODE		GENMASK(10, 8)
> +#define PMCR0_IMODE_OFF		0
> +#define PMCR0_IMODE_PMI		1
> +#define PMCR0_IMODE_AIC		2
> +#define PMCR0_IMODE_HALT	3
> +#define PMCR0_IMODE_FIQ		4
> +#define PMCR0_IACT		BIT(11)
> +
> +#endif /* __ASM_APPLE_M1_PMU_h */
> diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
> index 23f5f10e974e..9663166fd97f 100644
> --- a/drivers/irqchip/irq-apple-aic.c
> +++ b/drivers/irqchip/irq-apple-aic.c
> @@ -55,6 +55,7 @@
>   #include <linux/limits.h>
>   #include <linux/of_address.h>
>   #include <linux/slab.h>
> +#include <asm/apple_m1_pmu.h>
>   #include <asm/exception.h>
>   #include <asm/sysreg.h>
>   #include <asm/virt.h>
> @@ -109,16 +110,6 @@
>    * Note: sysreg-based IPIs are not supported yet.
>    */
>   
> -/* Core PMC control register */
> -#define SYS_IMP_APL_PMCR0_EL1		sys_reg(3, 1, 15, 0, 0)
> -#define PMCR0_IMODE			GENMASK(10, 8)
> -#define PMCR0_IMODE_OFF			0
> -#define PMCR0_IMODE_PMI			1
> -#define PMCR0_IMODE_AIC			2
> -#define PMCR0_IMODE_HALT		3
> -#define PMCR0_IMODE_FIQ			4
> -#define PMCR0_IACT			BIT(11)
> -
>   /* IPI request registers */
>   #define SYS_IMP_APL_IPI_RR_LOCAL_EL1	sys_reg(3, 5, 15, 0, 0)
>   #define SYS_IMP_APL_IPI_RR_GLOBAL_EL1	sys_reg(3, 5, 15, 0, 1)
> 

Reviewed-by: Hector Martin <marcan@...can.st>

-- 
Hector Martin (marcan@...can.st)
Public Key: https://mrcn.st/pub

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