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Message-Id: <20211213111642.11317-3-lukas.bulwahn@gmail.com>
Date: Mon, 13 Dec 2021 12:16:35 +0100
From: Lukas Bulwahn <lukas.bulwahn@...il.com>
To: Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
linux-mips@...r.kernel.org
Cc: kernel-janitors@...r.kernel.org, linux-kernel@...r.kernel.org,
"Maciej W . Rozycki" <macro@...am.me.uk>,
Sander Vanheule <sander@...nheule.net>,
Bert Vermeulen <bert@...t.com>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Serge Semin <Sergey.Semin@...kalelectronics.ru>,
Paul Burton <paulburton@...nel.org>,
Daniel Silsby <dansilsby@...il.com>,
Paul Cercueil <paul@...pouillou.net>,
Lukas Bulwahn <lukas.bulwahn@...il.com>
Subject: [PATCH 2/9] mips: add SYS_HAS_CPU_MIPS64_R5 config for MIPS Release 5 support
Commit ab7c01fdc3cf ("mips: Add MIPS Release 5 support") adds the two
configs CPU_MIPS32_R5 and CPU_MIPS64_R5, which depend on the corresponding
SYS_HAS_CPU_MIPS32_R5 and SYS_HAS_CPU_MIPS64_R5, respectively.
The config SYS_HAS_CPU_MIPS32_R5 was already introduced with commit
c5b367835cfc ("MIPS: Add support for XPA."); the config
SYS_HAS_CPU_MIPS64_R5, however, was never introduced.
Hence, ./scripts/checkkconfigsymbols.py warns:
SYS_HAS_CPU_MIPS64_R5
Referencing files: arch/mips/Kconfig, arch/mips/include/asm/cpu-type.h
Add the definition for config SYS_HAS_CPU_MIPS64_R5 under the assumption
that SYS_HAS_CPU_MIPS64_R5 follows the same pattern as the existing
SYS_HAS_CPU_MIPS32_R5 and SYS_HAS_CPU_MIPS64_R6.
Fixes: ab7c01fdc3cf ("mips: Add MIPS Release 5 support")
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@...il.com>
---
arch/mips/Kconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c89ce68d9580..878affb643e4 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -1905,6 +1905,10 @@ config SYS_HAS_CPU_MIPS64_R1
config SYS_HAS_CPU_MIPS64_R2
bool
+config SYS_HAS_CPU_MIPS64_R5
+ bool
+ select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
+
config SYS_HAS_CPU_MIPS64_R6
bool
select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
--
2.26.2
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