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Message-ID: <36c3469c-4fc4-e156-048a-47f9d001f47f@arm.com>
Date:   Mon, 13 Dec 2021 14:23:48 +0000
From:   James Clark <james.clark@....com>
To:     Mathieu Poirier <mathieu.poirier@...aro.org>
Cc:     Suzuki K Poulose <suzuki.poulose@....com>,
        coresight@...ts.linaro.org, Mike Leach <mike.leach@...aro.org>,
        Leo Yan <leo.yan@...aro.org>,
        John Garry <john.garry@...wei.com>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-perf-users@...r.kernel.org
Subject: Re: [PATCH 2/3] coresight: Fail to open with return stacks if they
 are unavailable



On 10/12/2021 17:22, Mathieu Poirier wrote:
> Hi James,
> 
> On Thu, Dec 09, 2021 at 11:13:55AM +0000, James Clark wrote:
>>
>>
>> On 09/12/2021 11:00, Suzuki K Poulose wrote:
>>> On 08/12/2021 16:09, James Clark wrote:
>>>> Maintain consistency with the other options by failing to open when they
>>>> aren't supported. For example ETM_OPT_TS, ETM_OPT_CTXTID2 and the newly
>>>> added ETM_OPT_BRANCH_BROADCAST all return with -EINVAL if they are
>>>> requested but not supported by hardware.
>>>>
>>>> The consequence of not doing this is that the user may not be
>>>> aware that they are not enabling the feature as it is silently disabled.
>>>>
>>>> Signed-off-by: James Clark <james.clark@....com>
>>>> ---
>>>> � drivers/hwtracing/coresight/coresight-etm4x-core.c | 13 +++++++++----
>>>> � 1 file changed, 9 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>>>> index d2bafb50c66a..0a9bb943a5e5 100644
>>>> --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
>>>> +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
>>>> @@ -674,10 +674,15 @@ static int etm4_parse_event_config(struct coresight_device *csdev,
>>>> ����� }
>>>> � ����� /* return stack - enable if selected and supported */
>>>> -��� if ((attr->config & BIT(ETM_OPT_RETSTK)) && drvdata->retstack)
>>>> -������� /* bit[12], Return stack enable bit */
>>>> -������� config->cfg |= BIT(12);
>>>> -
>>>> +��� if (attr->config & BIT(ETM_OPT_RETSTK)) {
>>>> +������� if (!drvdata->retstack) {
>>>> +����������� ret = -EINVAL;
>>>> +����������� goto out;
>>>> +������� } else {
>>>> +����������� /* bit[12], Return stack enable bit */
>>>> +����������� config->cfg |= BIT(12);
>>>> +������� }
>>>
>>> nit: While at this, please could you change the hard coded value
>>> to ETM4_CFG_BIT_RETSTK ?
>>>
>> I started changing them all because I had trouble searching for bits by name but then
>> I thought it would snowball into a bigger change so I undid it.
>>
>> I think I'll just go and do it now if it's an issue here.
> 
> I can apply this set right away and you send another patch to fix all hard coded
> bitfields or you can send another revision with all 4 patches included in it
> (bitfields fix plus these 3).  Just let me know what you want to do.  And next
> time please add a cover letter.

I think I would like to hold off for a bit based on Mike's feedback. Seems like I may
need to make a change about return stacks.

Thanks
James

> 
> Thanks,
> Mathieu
> 
>>
>>> Otherwise, looks good to me
>>>
>>> Suzuki

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