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Message-ID: <52edd5fd-daa0-729b-4646-43450552d2ab@intel.com>
Date: Mon, 13 Dec 2021 07:02:24 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: David Laight <David.Laight@...LAB.COM>,
'Noah Goldstein' <goldstein.w.n@...il.com>,
Eric Dumazet <edumazet@...gle.com>
Cc: "tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>,
X86 ML <x86@...nel.org>, "hpa@...or.com" <hpa@...or.com>,
"peterz@...radead.org" <peterz@...radead.org>,
"alexanderduyck@...com" <alexanderduyck@...com>,
open list <linux-kernel@...r.kernel.org>,
netdev <netdev@...r.kernel.org>
Subject: Re: [PATCH] x86/lib: Remove the special case for odd-aligned buffers
in csum_partial.c
On 12/13/21 6:43 AM, David Laight wrote:
> There is no need to special case the very unusual odd-aligned buffers.
> They are no worse than 4n+2 aligned buffers.
>
> Signed-off-by: David Laight <david.laight@...lab.com>
> ---
>
> On an i7-7700 misaligned buffers add 2 or 3 clocks (in 115) to a 512 byte
> checksum.
> That is just measuring the main loop with an lfence prior to rdpmc to
> read PERF_COUNT_HW_CPU_CYCLES.
I'm a bit confused by this changelog.
Are you saying that the patch causes a (small) performance regression?
Are you also saying that the optimization here is not worth it because
it saves 15 lines of code? Or that the misalignment checks themselves
add 2 or 3 cycles, and this is an *optimization*?
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