linux-kernel - [PATCH 5.15 117/171] clk: qcom: clk-alpha-pll: Dont reconfigure running Trion

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Message-Id: <20211213092949.000570788@linuxfoundation.org>
Date:   Mon, 13 Dec 2021 10:30:32 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Robert Foss <robert.foss@...aro.org>,
        Vinod Koul <vkoul@...nel.org>, Stephen Boyd <sboyd@...nel.org>
Subject: [PATCH 5.15 117/171] clk: qcom: clk-alpha-pll: Dont reconfigure running Trion

From: Bjorn Andersson <bjorn.andersson@...aro.org>

commit a1f0019c342bd83240b05be68c9888549dde7935 upstream.

In the event that the bootloader has configured the Trion PLL as source
for the display clocks, e.g. for the continuous splashscreen, then there
will also be RCGs that are clocked by this instance.

Reconfiguring, and in particular disabling the output of, the PLL will
cause issues for these downstream RCGs and has been shown to prevent
them from being re-parented.

Follow downstream and skip configuration if it's determined that the PLL
is already running.

Fixes: 59128c20a6a9 ("clk: qcom: clk-alpha-pll: Add support for controlling Lucid PLLs")
Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
Reviewed-by: Robert Foss <robert.foss@...aro.org>
Reviewed-by: Vinod Koul <vkoul@...nel.org>
Link: https://lore.kernel.org/r/20211123162508.153711-1-bjorn.andersson@linaro.org
Signed-off-by: Stephen Boyd <sboyd@...nel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
 drivers/clk/qcom/clk-alpha-pll.c |    9 +++++++++
 1 file changed, 9 insertions(+)

--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -1429,6 +1429,15 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_
 void clk_trion_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,
 			     const struct alpha_pll_config *config)
 {
+	/*
+	 * If the bootloader left the PLL enabled it's likely that there are
+	 * RCGs that will lock up if we disable the PLL below.
+	 */
+	if (trion_pll_is_enabled(pll, regmap)) {
+		pr_debug("Trion PLL is already enabled, skipping configuration\n");
+		return;
+	}
+
 	clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l);
 	regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL);
 	clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha);