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Message-ID: <20211214202106.uazcwby3365x2ymw@black.fi.intel.com>
Date:   Tue, 14 Dec 2021 23:21:06 +0300
From:   "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To:     Borislav Petkov <bp@...en8.de>
Cc:     tglx@...utronix.de, mingo@...hat.com, dave.hansen@...el.com,
        luto@...nel.org, peterz@...radead.org,
        sathyanarayanan.kuppuswamy@...ux.intel.com, aarcange@...hat.com,
        ak@...ux.intel.com, dan.j.williams@...el.com, david@...hat.com,
        hpa@...or.com, jgross@...e.com, jmattson@...gle.com,
        joro@...tes.org, jpoimboe@...hat.com, knsathya@...nel.org,
        pbonzini@...hat.com, sdeep@...are.com, seanjc@...gle.com,
        tony.luck@...el.com, vkuznets@...hat.com, wanpengli@...cent.com,
        x86@...nel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 01/26] x86/tdx: Detect running as a TDX guest in early
 boot

On Tue, Dec 14, 2021 at 07:18:14PM +0100, Borislav Petkov wrote:
> > In preparation of extending cc_platform_has() API to support TDX guest,
> > use CPUID instruction to detect for TDX guests support in the early
> 
> " ... to detect support for TDX guests... "

Right, thanks.

> > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> > index 793e9b42ace0..a61ac6f8821a 100644
> > --- a/arch/x86/Kconfig
> > +++ b/arch/x86/Kconfig
> > @@ -872,6 +872,19 @@ config ACRN_GUEST
> >  	  IOT with small footprint and real-time features. More details can be
> >  	  found in https://projectacrn.org/.
> >  
> > +# TDX guest uses X2APIC for interrupt management.
> 
> For whom is that comment and who's going to see it? Is that comment
> supposed to explain the "depends on X86_X2APIC" below?

Yes.

But I think it should be pretty self-explanatory. I'll drop it.

> > +config INTEL_TDX_GUEST
> > +	bool "Intel TDX (Trust Domain Extensions) - Guest Support"
> > +	depends on X86_64 && CPU_SUP_INTEL
> > +	depends on X86_X2APIC
> > +	help
> > +	  Support running as a guest under Intel TDX.  Without this support,
> > +	  the guest kernel can not boot or run under TDX.
> > +	  TDX includes memory encryption and integrity capabilities
> > +	  which protect the confidentiality and integrity of guest
> > +	  memory contents and CPU state. TDX guests are protected from
> > +	  potential attacks from the VMM.
> > +

-- 
 Kirill A. Shutemov

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