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Message-ID: <7e4eb48c-8b03-e3d3-3ed7-1bca5a42aea3@xilinx.com>
Date: Tue, 14 Dec 2021 11:35:03 +0100
From: Michal Simek <michal.simek@...inx.com>
To: David Heidelberg <david@...t.cz>, Rob Herring <robh+dt@...nel.org>,
Michal Simek <michal.simek@...inx.com>
CC: <~okias/devicetree@...ts.sr.ht>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2] arm64: xilinx: dts: drop legacy property
#stream-id-cells
On 12/8/21 19:48, David Heidelberg wrote:
> Property #stream-id-cells is legacy leftover and isn't currently
> documented nor used.
>
> Signed-off-by: David Heidelberg <david@...t.cz>
> ---
> v2:
> - split qcom and xilinx
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 28 --------------------------
> 1 file changed, 28 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index 74e66443e4ce..493719f71fb5 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -262,7 +262,6 @@ fpd_dma_chan1: dma@...00000 {
> interrupts = <0 124 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <128>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x14e8>;
> power-domains = <&zynqmp_firmware PD_GDMA>;
> };
> @@ -275,7 +274,6 @@ fpd_dma_chan2: dma@...10000 {
> interrupts = <0 125 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <128>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x14e9>;
> power-domains = <&zynqmp_firmware PD_GDMA>;
> };
> @@ -288,7 +286,6 @@ fpd_dma_chan3: dma@...20000 {
> interrupts = <0 126 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <128>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x14ea>;
> power-domains = <&zynqmp_firmware PD_GDMA>;
> };
> @@ -301,7 +298,6 @@ fpd_dma_chan4: dma@...30000 {
> interrupts = <0 127 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <128>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x14eb>;
> power-domains = <&zynqmp_firmware PD_GDMA>;
> };
> @@ -314,7 +310,6 @@ fpd_dma_chan5: dma@...40000 {
> interrupts = <0 128 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <128>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x14ec>;
> power-domains = <&zynqmp_firmware PD_GDMA>;
> };
> @@ -327,7 +322,6 @@ fpd_dma_chan6: dma@...50000 {
> interrupts = <0 129 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <128>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x14ed>;
> power-domains = <&zynqmp_firmware PD_GDMA>;
> };
> @@ -340,7 +334,6 @@ fpd_dma_chan7: dma@...60000 {
> interrupts = <0 130 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <128>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x14ee>;
> power-domains = <&zynqmp_firmware PD_GDMA>;
> };
> @@ -353,7 +346,6 @@ fpd_dma_chan8: dma@...70000 {
> interrupts = <0 131 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <128>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x14ef>;
> power-domains = <&zynqmp_firmware PD_GDMA>;
> };
> @@ -383,7 +375,6 @@ lpd_dma_chan1: dma@...80000 {
> interrupts = <0 77 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <64>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x868>;
> power-domains = <&zynqmp_firmware PD_ADMA>;
> };
> @@ -396,7 +387,6 @@ lpd_dma_chan2: dma@...90000 {
> interrupts = <0 78 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <64>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x869>;
> power-domains = <&zynqmp_firmware PD_ADMA>;
> };
> @@ -409,7 +399,6 @@ lpd_dma_chan3: dma@...a0000 {
> interrupts = <0 79 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <64>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x86a>;
> power-domains = <&zynqmp_firmware PD_ADMA>;
> };
> @@ -422,7 +411,6 @@ lpd_dma_chan4: dma@...b0000 {
> interrupts = <0 80 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <64>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x86b>;
> power-domains = <&zynqmp_firmware PD_ADMA>;
> };
> @@ -435,7 +423,6 @@ lpd_dma_chan5: dma@...c0000 {
> interrupts = <0 81 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <64>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x86c>;
> power-domains = <&zynqmp_firmware PD_ADMA>;
> };
> @@ -448,7 +435,6 @@ lpd_dma_chan6: dma@...d0000 {
> interrupts = <0 82 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <64>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x86d>;
> power-domains = <&zynqmp_firmware PD_ADMA>;
> };
> @@ -461,7 +447,6 @@ lpd_dma_chan7: dma@...e0000 {
> interrupts = <0 83 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <64>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x86e>;
> power-domains = <&zynqmp_firmware PD_ADMA>;
> };
> @@ -474,7 +459,6 @@ lpd_dma_chan8: dma@...f0000 {
> interrupts = <0 84 4>;
> clock-names = "clk_main", "clk_apb";
> xlnx,bus-width = <64>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x86f>;
> power-domains = <&zynqmp_firmware PD_ADMA>;
> };
> @@ -495,7 +479,6 @@ nand0: nand-controller@...00000 {
> interrupts = <0 14 4>;
> #address-cells = <1>;
> #size-cells = <0>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x872>;
> power-domains = <&zynqmp_firmware PD_NAND>;
> };
> @@ -509,7 +492,6 @@ gem0: ethernet@...b0000 {
> clock-names = "pclk", "hclk", "tx_clk";
> #address-cells = <1>;
> #size-cells = <0>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x874>;
> power-domains = <&zynqmp_firmware PD_ETH_0>;
> };
> @@ -523,7 +505,6 @@ gem1: ethernet@...c0000 {
> clock-names = "pclk", "hclk", "tx_clk";
> #address-cells = <1>;
> #size-cells = <0>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x875>;
> power-domains = <&zynqmp_firmware PD_ETH_1>;
> };
> @@ -537,7 +518,6 @@ gem2: ethernet@...d0000 {
> clock-names = "pclk", "hclk", "tx_clk";
> #address-cells = <1>;
> #size-cells = <0>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x876>;
> power-domains = <&zynqmp_firmware PD_ETH_2>;
> };
> @@ -551,7 +531,6 @@ gem3: ethernet@...e0000 {
> clock-names = "pclk", "hclk", "tx_clk";
> #address-cells = <1>;
> #size-cells = <0>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x877>;
> power-domains = <&zynqmp_firmware PD_ETH_3>;
> };
> @@ -621,7 +600,6 @@ pcie: pcie@...e0000 {
> <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
> <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
> <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x4d0>;
> power-domains = <&zynqmp_firmware PD_PCIE>;
> pcie_intc: legacy-interrupt-controller {
> @@ -642,7 +620,6 @@ qspi: spi@...f0000 {
> <0x0 0xc0000000 0x0 0x8000000>;
> #address-cells = <1>;
> #size-cells = <0>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x873>;
> power-domains = <&zynqmp_firmware PD_QSPI>;
> };
> @@ -674,7 +651,6 @@ sata: ahci@...c0000 {
> interrupts = <0 133 4>;
> power-domains = <&zynqmp_firmware PD_SATA>;
> resets = <&zynqmp_reset ZYNQMP_RESET_SATA>;
> - #stream-id-cells = <4>;
> iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
> <&smmu 0x4c2>, <&smmu 0x4c3>;
> };
> @@ -686,7 +662,6 @@ sdhci0: mmc@...60000 {
> interrupts = <0 48 4>;
> reg = <0x0 0xff160000 0x0 0x1000>;
> clock-names = "clk_xin", "clk_ahb";
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x870>;
> #clock-cells = <1>;
> clock-output-names = "clk_out_sd0", "clk_in_sd0";
> @@ -700,7 +675,6 @@ sdhci1: mmc@...70000 {
> interrupts = <0 49 4>;
> reg = <0x0 0xff170000 0x0 0x1000>;
> clock-names = "clk_xin", "clk_ahb";
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x871>;
> #clock-cells = <1>;
> clock-output-names = "clk_out_sd1", "clk_in_sd1";
> @@ -825,7 +799,6 @@ dwc3_0: usb@...00000 {
> interrupt-parent = <&gic>;
> interrupt-names = "dwc_usb3", "otg";
> interrupts = <0 65 4>, <0 69 4>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x860>;
> snps,quirk-frame-length-adjustment = <0x20>;
> /* dma-coherent; */
> @@ -852,7 +825,6 @@ dwc3_1: usb@...00000 {
> interrupt-parent = <&gic>;
> interrupt-names = "dwc_usb3", "otg";
> interrupts = <0 70 4>, <0 74 4>;
> - #stream-id-cells = <1>;
> iommus = <&smmu 0x861>;
> snps,quirk-frame-length-adjustment = <0x20>;
> /* dma-coherent; */
Applied.
M
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