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Message-ID: <CAMuHMdXT-SSqtx=_DT0J0Yus-WSPsYv2GOtehjGq2KbWQHbA5Q@mail.gmail.com>
Date: Tue, 14 Dec 2021 11:41:16 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
Cc: Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 1/2] arm64: dts: renesas: r8a779a0: Add DSI encoders
Hi Kieran,
On Tue, Nov 30, 2021 at 5:43 PM Kieran Bingham
<kieran.bingham+renesas@...asonboard.com> wrote:
> Provide the two MIPI DSI encoders on the V3U and connect them to the DU
> accordingly.
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@...asonboard.com>
> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -2290,12 +2290,14 @@ ports {
> port@0 {
> reg = <0>;
> du_out_dsi0: endpoint {
> + remote-endpoint = <&dsi0_in>;
> };
> };
>
> port@1 {
> reg = <1>;
> du_out_dsi1: endpoint {
> + remote-endpoint = <&dsi1_in>;
> };
> };
> };
> @@ -2633,6 +2635,64 @@ isp3vin31: endpoint {
> };
> };
>
> + dsi0: dsi-encoder@...80000 {
> + compatible = "renesas,r8a779a0-dsi-csi2-tx";
> + reg = <0 0xfed80000 0 0x10000>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + clocks = <&cpg CPG_MOD 415>,
> + <&cpg CPG_CORE R8A779A0_CLK_DSI>,
> + <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
> + clock-names = "fck", "dsi", "pll";
> +
> + resets = <&cpg 415>;
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + dsi0_in: endpoint {
> + remote-endpoint = <&du_out_dsi0>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + };
> + };
> + };
> +
> + dsi1: dsi-encoder@...90000 {
> + compatible = "renesas,r8a779a0-dsi-csi2-tx";
> + reg = <0 0xfed90000 0 0x10000>;
> + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> + clocks = <&cpg CPG_MOD 415>,
416?
> + <&cpg CPG_CORE R8A779A0_CLK_DSI>,
> + <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
> + clock-names = "fck", "dsi", "pll";
> +
> + resets = <&cpg 416>;
That one is OK.
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-devel for v5.17 with the above fixed.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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