lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YbogZqBsR0Tfz33P@robh.at.kernel.org>
Date:   Wed, 15 Dec 2021 11:05:42 -0600
From:   Rob Herring <robh@...nel.org>
To:     Tudor Ambarus <tudor.ambarus@...rochip.com>
Cc:     alexandre.belloni@...tlin.com, broonie@...nel.org,
        linux-arm-kernel@...ts.infradead.org, robh+dt@...nel.org,
        linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
        ludovic.desroches@...rochip.com, nicolas.ferre@...rochip.com,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] dt-bindings: spi: atmel,quadspi: Define sama7g5 QSPI

On Thu, 09 Dec 2021 14:29:39 +0200, Tudor Ambarus wrote:
> sama7g5 embedds 2 instances of the QSPI controller:
> 1/ One Octal Serial Peripheral Interface (QSPI0) Supporting up to
>    200 MHz DDR. Octal, TwinQuad, HyperFlash and OctaFlash Protocols
>    Supported
> 2/ One Quad Serial Peripheral Interface (QSPI1) Supporting Up to
>    90 MHz DDR/133 MHz SDR
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@...rochip.com>
> ---
>  .../devicetree/bindings/spi/atmel,quadspi.yaml   | 16 ++++++++++++++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ