linux-kernel - Re: [PATCH v3 03/10] dt-bindings: apple,aic: Add affinity description for per-cpu pseudo-interrupts

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <YbpflHyduDzZb3vx@robh.at.kernel.org>
Date:   Wed, 15 Dec 2021 15:35:16 -0600
From:   Rob Herring <robh@...nel.org>
To:     Marc Zyngier <maz@...nel.org>
Cc:     linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, Mark Rutland <mark.rutland@....com>,
        Will Deacon <will@...nel.org>,
        Hector Martin <marcan@...can.st>,
        Sven Peter <sven@...npeter.dev>,
        Alyssa Rosenzweig <alyssa@...enzweig.io>,
        Thomas Gleixner <tglx@...utronix.de>,
        Dougall <dougallj@...il.com>, kernel-team@...roid.com
Subject: Re: [PATCH v3 03/10] dt-bindings: apple,aic: Add affinity
 description for per-cpu pseudo-interrupts

On Tue, Dec 14, 2021 at 06:26:27PM +0000, Marc Zyngier wrote:
> Some of the FIQ per-cpu pseudo-interrupts are better described with
> a specific affinity, the most obvious candidate being the CPU PMUs.
> 
> Augment the AIC binding to be able to specify that affinity in the
> interrupt controller node.
> 
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> ---
>  .../interrupt-controller/apple,aic.yaml       | 26 +++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> index b95e41816953..ac1c82cffa0a 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
> @@ -67,6 +67,32 @@ properties:
>        Specifies base physical address and size of the AIC registers.
>      maxItems: 1
>  
> +  affinities:
> +    type: object
> +    description:
> +      FIQ affinity can be expressed as a single "affinities" node,
> +      containing a set of sub-nodes, one per FIQ with a non-default
> +      affinity.
> +    patternProperties:
> +      "^.+-affinity$":
> +        type: object
> +        properties:
> +          fiq-index:
> +            description:
> +              The interrupt number specified as a FIQ, and for which
> +              the affinity is not the default.
> +            $ref: /schemas/types.yaml#/definitions/uint32
> +            maximum: 5

blank line between each prop.

> +          affinity:

'cpus' is already somewhat established for list of phandles to cpu 
nodes.

> +            $ref: /schemas/types.yaml#/definitions/phandle-array
> +            description:
> +              Should be a list of phandles to CPU nodes (as described in
> +              Documentation/devicetree/bindings/arm/cpus.yaml).
> +
> +        required:
> +          - fiq-index
> +          - affinity
> +
>  required:
>    - compatible
>    - '#interrupt-cells'
> -- 
> 2.30.2
> 
>