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Message-ID: <20211215031955.28244-1-yc.hung@mediatek.com>
Date: Wed, 15 Dec 2021 11:19:55 +0800
From: YC Hung <yc.hung@...iatek.com>
To: <broonie@...nel.org>, <tiwai@...e.com>, <robh+dt@...nel.org>,
<matthias.bgg@...il.com>
CC: <yc.hung@...iatek.com>, <alsa-devel@...a-project.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<daniel.baluta@....com>, <trevor.wu@...iatek.com>,
<allen-kh.cheng@...iatek.com>
Subject: [PATCH] dt-bindings: dsp: mediatek: add mt8195 dsp document
From: "yc.hung" <yc.hung@...iatek.com>
This patch adds mt8195 dsp document.
Signed-off-by: yc.hung <yc.hung@...iatek.com>
---
.../bindings/dsp/mtk,mt8195-dsp.yaml | 116 ++++++++++++++++++
1 file changed, 116 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
diff --git a/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
new file mode 100644
index 000000000000..33db11ee2336
--- /dev/null
+++ b/Documentation/devicetree/bindings/dsp/mtk,mt8195-dsp.yaml
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dsp/mtk,mt8195-dsp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Mediatek mt8195 DSP core
+
+maintainers:
+ - YC Hung <yc.hung@...iatek.com>
+
+description: |
+ Some boards from mt8195 contain a DSP core used for
+ advanced pre- and post- audio processing.
+properties:
+ compatible:
+ const: mediatek,mt8195-dsp
+
+ reg:
+ items:
+ - description: Address and size of the DSP Cfg registers
+ - description: Address and size of the DSP SRAM
+
+ reg-names:
+ items:
+ - const: cfg
+ - const: sram
+
+ interrupts:
+ items:
+ - description: watchdog interrupt
+
+ interrupt-names:
+ items:
+ - const: wdt
+
+ clocks:
+ items:
+ - description: mux for audio dsp clock
+ - description: 26M clock
+ - description: mux for audio dsp local bus
+ - description: default audio dsp local bus clock source
+ - description: clock gate for audio dsp clock
+ - description: mux for audio dsp access external bus
+
+ clock-names:
+ items:
+ - const: adsp_sel
+ - const: clk26m_ck
+ - const: audio_local_bus
+ - const: mainpll_d7_d2
+ - const: scp_adsp_audiodsp
+ - const: audio_h
+
+ power-domains:
+ maxItems: 1
+
+ mboxes:
+ items:
+ - description: a mailbox is ised for ipc reply between host and audio DSP.
+ - description: a mailbox is ised for ipc reuqest between host and audio DSP.
+
+ mbox-names:
+ items:
+ - const: mbox0
+ - const: mbox1
+
+ memory-region:
+ items:
+ - description: A phandle to a reserved memory region is used for dma buffer between host and DSP.
+ - description: A phandle to a reserved memory region is used for DSP system memory.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - memory-region
+ - power-domains
+ - mbox-names
+ - mboxes
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ adsp: dsp@...03000 {
+ compatible = "mediatek,mt8195-dsp";
+ reg = <0x10803000 0x1000>,
+ <0x10840000 0x40000>;
+ reg-names = "cfg", "sram";
+ interrupts = <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "wdt";
+ clocks = <&topckgen 10>, //CLK_TOP_ADSP
+ <&clk26m>,
+ <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
+ <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
+ <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
+ <&topckgen 34>; //CLK_TOP_AUDIO_H
+ clock-names = "adsp_sel",
+ "clk26m_ck",
+ "audio_local_bus",
+ "mainpll_d7_d2",
+ "scp_adsp_audiodsp",
+ "audio_h";
+ memory-region = <&adsp_dma_mem_reserved>,
+ <&adsp_mem_reserved>;
+ power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
+ mbox-names = "mbox0", "mbox1";
+ mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
+ };
--
2.18.0
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