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Message-ID: <20211216200751.u2guamsj5ptezans@ti.com>
Date: Fri, 17 Dec 2021 01:37:53 +0530
From: Pratyush Yadav <p.yadav@...com>
To: Alexander A Sverdlin <alexander.sverdlin@...ia.com>
CC: <linux-mtd@...ts.infradead.org>,
Tudor Ambarus <tudor.ambarus@...rochip.com>,
Michael Walle <michael@...le.cc>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] mtd: spi-nor: micron/st: Hardcode erase_proto to
1-1-1
On 09/12/21 11:08AM, Alexander A Sverdlin wrote:
> From: Alexander Sverdlin <alexander.sverdlin@...ia.com>
>
> This fixes sector erase on mt25qu256aba8e12-1sit.
> Looks like others like mt35xu512aba could be affected as well.
Indeed. mt35xu512aba would need to set erase_proto to 8D-8D-8D mode.
>
> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@...ia.com>
> ---
> drivers/mtd/spi-nor/micron-st.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
> index 2f3054b..058bbb7 100644
> --- a/drivers/mtd/spi-nor/micron-st.c
> +++ b/drivers/mtd/spi-nor/micron-st.c
> @@ -267,6 +267,12 @@ static void micron_st_default_init(struct spi_nor *nor)
> nor->flags &= ~SNOR_F_HAS_16BIT_SR;
> nor->params->quad_enable = NULL;
> nor->params->set_4byte_addr_mode = st_micron_set_4byte_addr_mode;
> +
> + /*
> + * mt25qu doesn't support all possible write protocols for erase, only
> + * 1-1-0, 2-2-0, 4-4-0.
> + */
> + nor->erase_proto = SNOR_PROTO_1_1_1;
If this is only a mt25qu thing, why do it for all Micron flashes?
Anyway, _if_ you do as I suggest in patch 1, this won't be needed.
> }
>
> static const struct spi_nor_fixups micron_st_fixups = {
> --
> 2.10.2
>
--
Regards,
Pratyush Yadav
Texas Instruments Inc.
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