lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <2527a359-eaad-9e7f-bc9a-bf2732997afd@gmail.com>
Date:   Thu, 16 Dec 2021 18:14:30 +0800
From:   Like Xu <like.xu.linux@...il.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Like Xu <likexu@...cent.com>
Subject: Re: [PATCH v2 0/6] KVM: x86/pmu: Count two basic events for emulated
 instructions

On 10/12/2021 3:30 am, Paolo Bonzini wrote:
> On 11/30/21 08:42, Like Xu wrote:
>> Hi,
>>
>> [ Jim is on holiday, so I'm here to continue this work. ]
>>
>> Some cloud customers need accurate virtualization of two
>> basic PMU events on x86 hardware: "instructions retired" and
>> "branch instructions retired". The existing PMU virtualization code
>> fails to account for instructions (e.g, CPUID) that are emulated by KVM.
>>
>> Accurately virtualizing all PMU events for all microarchitectures is a
>> herculean task, let's just stick to the two events covered by this set.
>>
>> Eric Hankland wrote this code originally, but his plate is full, so Jim
>> and I volunteered to shepherd the changes through upstream acceptance.
>>
>> Thanks,
>>
>> v1 -> v2 Changelog:
>> - Include the patch set [1] and drop the intel_find_fixed_event(); [Paolo]
>>    (we will fix the misleading Intel CPUID events in another patch set)
>> - Drop checks for pmc->perf_event or event state or event type;
>> - Increase a counter once its umask bits and the first 8 select bits are matched;
>> - Rewrite kvm_pmu_incr_counter() with a less invasive approach to the host perf;
>> - Rename kvm_pmu_record_event to kvm_pmu_trigger_event;
>> - Add counter enable check for kvm_pmu_trigger_event();
>> - Add vcpu CPL check for kvm_pmu_trigger_event(); [Jim]
>>
>> Previous:
>> https://lore.kernel.org/kvm/20211112235235.1125060-2-jmattson@google.com/
>>
>> [1] https://lore.kernel.org/kvm/20211119064856.77948-1-likexu@tencent.com/
>>
>> Jim Mattson (1):
>>    KVM: x86: Update vPMCs when retiring branch instructions
>>
>> Like Xu (5):
>>    KVM: x86/pmu: Setup pmc->eventsel for fixed PMCs
>>    KVM: x86/pmu: Refactoring find_arch_event() to pmc_perf_hw_id()
>>    KVM: x86/pmu: Reuse pmc_perf_hw_id() and drop find_fixed_event()
>>    KVM: x86/pmu: Add pmc->intr to refactor kvm_perf_overflow{_intr}()
>>    KVM: x86: Update vPMCs when retiring instructions
>>
>>   arch/x86/include/asm/kvm_host.h |   1 +
>>   arch/x86/kvm/emulate.c          |  55 ++++++++------
>>   arch/x86/kvm/kvm_emulate.h      |   1 +
>>   arch/x86/kvm/pmu.c              | 128 ++++++++++++++++++++++----------
>>   arch/x86/kvm/pmu.h              |   5 +-
>>   arch/x86/kvm/svm/pmu.c          |  19 ++---
>>   arch/x86/kvm/vmx/nested.c       |   7 +-
>>   arch/x86/kvm/vmx/pmu_intel.c    |  44 ++++++-----
>>   arch/x86/kvm/x86.c              |   5 ++
>>   9 files changed, 167 insertions(+), 98 deletions(-)
>>
> 
> Queued patches 1-4, thanks.
> 
> Paolo
> 

Hi Paolo,

do we miss the fourth patch in the kvm/queue tree or are there
any new ideas or comments that we don't take it on board ?

Actually, the motivation is that the v11 pebs is rebased w/ first four patches.

Thanks,
Like Xu

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ