lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 16 Dec 2021 14:14:41 +0000
From:   Jiaxun Yang <jiaxun.yang@...goat.com>
To:     Arnd Bergmann <arnd@...db.de>
Cc:     Xi Ruoyao <xry111@...gyan1223.wang>,
        Sergio Paracuellos <sergio.paracuellos@...il.com>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Rob Herring <robh@...nel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Liviu Dudau <Liviu.Dudau@....com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
        linux-pci <linux-pci@...r.kernel.org>,
        linux-staging@...ts.linux.dev, NeilBrown <neil@...wn.name>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 5/6] MIPS: implement architecture-specific
 'pci_remap_iospace()'



在 2021/12/16 13:50, Arnd Bergmann 写道:
> On Thu, Dec 16, 2021 at 2:07 PM Jiaxun Yang <jiaxun.yang@...goat.com> wrote:
>> 在2021年12月16日十二月 上午11:44,Xi Ruoyao写道:
>> Another way could be keeping a linked list about PIO->PHYS mapping instead of using the single io_port_base variable.
> I think that would add a lot of complexity that isn't needed here. Not
> sure if all MIPS CPUs
> can do it, but the approach used on Arm is what fits in best with the
> PCI drivers, these
> reserve a virtual address range for the ports, and ioremap the
> physical addresses into
> the PIO range according to the mapping.

Yes, the Arm way was my previous approach when introducing PCI IO map
for Loongson.

It got refactored by this patch as TLB entries are expensive on MIPS,
also the size of IO range doesn't always fits a page.

>
> For the loongson case specifically, that's not even needed though, as
> the two buses
> have physically contiguous I/O port ranges, the code just needs to
> detect this special
> case.

We have MIPS Boston board (from imgtec) which has discontinuous IO
range.

Thanks.

>
>          Arnd
- Jiaxun

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ