linux-kernel - Re: [PATCH v3 5/6] MIPS: implement architecture-specific 'pci_remap

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Message-ID: <CAK8P3a1nozEpQ_9Q+NhocWZDsrfLmDibrkmoX8ph63wYaFxvjg@mail.gmail.com>
Date:   Thu, 16 Dec 2021 15:32:01 +0100
From:   Arnd Bergmann <arnd@...db.de>
To:     Jiaxun Yang <jiaxun.yang@...goat.com>
Cc:     Arnd Bergmann <arnd@...db.de>, Xi Ruoyao <xry111@...gyan1223.wang>,
        Sergio Paracuellos <sergio.paracuellos@...il.com>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Rob Herring <robh@...nel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Liviu Dudau <Liviu.Dudau@....com>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        "linux-mips@...r.kernel.org" <linux-mips@...r.kernel.org>,
        linux-pci <linux-pci@...r.kernel.org>,
        linux-staging@...ts.linux.dev, NeilBrown <neil@...wn.name>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 5/6] MIPS: implement architecture-specific 'pci_remap_iospace()'

On Thu, Dec 16, 2021 at 3:27 PM Jiaxun Yang <jiaxun.yang@...goat.com> wrote:
> 在 2021/12/16 14:18, Arnd Bergmann 写道:
> >> It got refactored by this patch as TLB entries are expensive on MIPS,
> >> also the size of IO range doesn't always fits a page.
> > Are PIO accesses common enough that the TLB entry makes a difference?
> > I would imagine that on most systems with a PCI bus, there is not even
> > a single device that exposes an I/O resource, and even on those devices that
> > do, the kernel drivers tend to pick MMIO whenever both are available.
>
> Actually that was claimed by the author of this patch :-)
> I can understand the point. As he is working on a ramips system utlizes
> 1004Kec,
> which has only 32 TLB entries, saving a entry can give considerable
> improvement.

Ok

> For Loongson as we have legacy i8042/i8259 which can only be accessed via
> PIO, the access is very common.

Ah, right. It makes a lot of sense that anything based on ISA PC peripherals
would need it, regardless of the PCI support.

       Arnd