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Message-Id: <20211217175606.22645-2-digetx@gmail.com>
Date: Fri, 17 Dec 2021 20:55:56 +0300
From: Dmitry Osipenko <digetx@...il.com>
To: Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Mark Brown <broonie@...nel.org>, Takashi Iwai <tiwai@...e.com>,
Jaroslav Kysela <perex@...ex.cz>,
Liam Girdwood <lgirdwood@...il.com>,
Agneli <poczt@...tonmail.ch>
Cc: linux-tegra@...r.kernel.org, alsa-devel@...a-project.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: [PATCH v5 01/11] ASoC: dt-bindings: Add binding for Tegra20 S/PDIF
Add device-tree binding for Tegra20 S/PDIF controller.
Reviewed-by: Rob Herring <robh@...nel.org>
Acked-by: Thierry Reding <treding@...dia.com>
Signed-off-by: Dmitry Osipenko <digetx@...il.com>
---
.../bindings/sound/nvidia,tegra20-spdif.yaml | 85 +++++++++++++++++++
1 file changed, 85 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml
diff --git a/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml b/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml
new file mode 100644
index 000000000000..296248eed0ee
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/nvidia,tegra20-spdif.yaml
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NVIDIA Tegra20 S/PDIF Controller
+
+description: |
+ The S/PDIF controller supports both input and output in serial audio
+ digital interface format. The input controller can digitally recover
+ a clock from the received stream. The S/PDIF controller is also used
+ to generate the embedded audio for HDMI output channel.
+
+maintainers:
+ - Thierry Reding <treding@...dia.com>
+ - Jon Hunter <jonathanh@...dia.com>
+
+properties:
+ compatible:
+ const: nvidia,tegra20-spdif
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ minItems: 2
+
+ clock-names:
+ items:
+ - const: out
+ - const: in
+
+ resets:
+ maxItems: 1
+
+ dmas:
+ minItems: 2
+
+ dma-names:
+ items:
+ - const: rx
+ - const: tx
+
+ "#sound-dai-cells":
+ const: 0
+
+ nvidia,fixed-parent-rate:
+ description: |
+ Specifies whether board prefers parent clock to stay at a fixed rate.
+ This allows multiple Tegra20 audio components work simultaneously by
+ limiting number of supportable audio rates.
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+ - resets
+ - dmas
+ - dma-names
+ - "#sound-dai-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ spdif@...02400 {
+ compatible = "nvidia,tegra20-spdif";
+ reg = <0x70002400 0x200>;
+ interrupts = <77>;
+ clocks = <&clk 99>, <&clk 98>;
+ clock-names = "out", "in";
+ resets = <&rst 10>;
+ dmas = <&apbdma 3>, <&apbdma 3>;
+ dma-names = "rx", "tx";
+ #sound-dai-cells = <0>;
+ };
+
+...
--
2.33.1
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