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Message-Id: <20211217065731.30928-1-dejia.shang@armchina.com>
Date: Fri, 17 Dec 2021 14:57:31 +0800
From: Dejia Shang <dejia.shang@...china.com>
To: robh@...nel.org
Cc: devicetree@...r.kernel.org, gregkh@...uxfoundation.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
dejia.shang@...china.com, toby.huang@...china.com
Subject: Re: [PATCH 3/4] dt-bindings: add vendor-prefix and documentation for Zhouyi NPU
> On Wed, Dec 15, 2021 at 06:36:08PM +0800, Dejia Shang wrote:
> > To enable this NPU IP in Arm-Linux system, SoC vendors should write
> > devicetree files as documented.
> >
> > Signed-off-by: Dejia Shang <dejia.shang@...china.com>
> > ---
> > .../bindings/misc/armchina,zhouyi-npu.yaml | 57 +++++++++++++++++++
> > .../devicetree/bindings/vendor-prefixes.yaml | 2 +
> > 2 files changed, 59 insertions(+)
> > create mode 100644
> > Documentation/devicetree/bindings/misc/armchina,zhouyi-npu.yaml
> >
> > diff --git
> > a/Documentation/devicetree/bindings/misc/armchina,zhouyi-npu.yaml
> > b/Documentation/devicetree/bindings/misc/armchina,zhouyi-npu.yaml
> > new file mode 100644
> > index 000000000000..d3fdea101114
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/misc/armchina,zhouyi-
> npu.yaml
> > @@ -0,0 +1,57 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id: "http://devicetree.org/schemas/misc/armchina,zhouyi-npu.yaml#"
> > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> > +
> > +title: ArmChina Zhouyi NPU bindings
> > +
> > +maintainers:
> > + - Dejia Shang <dejia.shang@...china.com>
> > +
> > +description: |
> > + Armchina AI accelerator IP - Zhouyi NPU
> > +
> > +properties:
> > + compatible:
> > + items:
> > + - const: armchina,zhouyi-v1
> > + - const: armchina,zhouyi-v2
> > + - const: armchina,zhouyi
>
> This says compatible must be a list of all 3 of these.
>
> Where do v1 and v2 come from? We don't do version numbers in DT usually
> unless they correspond to h/w revision registers or h/w documentation. I
> would assume the h/w follows the Arm rXpY form?
>
Yes, the Zhouyi NPU h/w follows the Arm rXpY form but "zhouyi-v1" (z1) and "zhouyi-v2" (z2)
represent two generations of Zhouyi. They have different h/w architecture, revision registers
and documentation.
I think I can remove "armchina,zhouyi-v1" and "armchina,zhouyi-v2" because the driver does not
depend on them to tell the NPU arch.
> > +
> > + reg:
> > + maxItems: 1
> > +
> > + memory-region:
> > + maxItems: 2
>
> What is each region?
>
> This requires 2 entries, but the example only has 1.
>
They are reserved regions in DDR and SoC SRAM, and the latter one is optional for a SoC.
Should I also add the second one into the example?
> > +
> > + interrupts:
> > + maxItems: 1
> > +
> > +required:
> > + - compatible
> > + - reg
> > + - interrupts
> > +
> > +examples:
> > + - |
> > + #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > + reserved-memory {
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges;
> > +
> > + aipu_ddr_reserved: aipu-shmem@...0000000 {
>
> aipu-shmem@...00000
I will fix that.
>
> > + compatible = "shared-dma-pool";
> > + no-map;
> > + reg = <0x0 0xA0000000 0x0 0x4000000>;
> > + };
> > + };
> > +
> > + aipu0@...4000000 {
>
> Drop '0x'
I will fix that.
>
> > + compatible = "armchina,zhouyi";
> > + reg = <0x0 0x64000000 0x0 0x1000>;
> > + memory-region=<&aipu_ddr_reserved>;
> > + interrupts = <0 168 1>;
> > + };
> > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > index 66d6432fd781..4b1865d92455 100644
> > --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
> > @@ -123,6 +123,8 @@ patternProperties:
> > description: ARM Ltd.
> > "^armadeus,.*":
> > description: ARMadeus Systems SARL
> > + "^armchina,.*":
> > + description: Arm Technology (China) Co., Ltd.
> > "^arrow,.*":
> > description: Arrow Electronics
> > "^artesyn,.*":
> > --
> > 2.17.1
> >
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