linux-kernel - [PATCH v2 06/17] dt-bindings: rng: add bindings for microchip mpfs rng

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Message-ID: <20211217093325.30612-7-conor.dooley@microchip.com>
Date:   Fri, 17 Dec 2021 09:33:14 +0000
From:   <conor.dooley@...rochip.com>
To:     <linus.walleij@...aro.org>, <bgolaszewski@...libre.com>,
        <robh+dt@...nel.org>, <jassisinghbrar@...il.com>,
        <paul.walmsley@...ive.com>, <palmer@...belt.com>,
        <aou@...s.berkeley.edu>, <a.zummo@...ertech.it>,
        <alexandre.belloni@...tlin.com>, <broonie@...nel.org>,
        <gregkh@...uxfoundation.org>, <thierry.reding@...il.com>,
        <u.kleine-koenig@...gutronix.de>, <lee.jones@...aro.org>,
        <linux-gpio@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
        <linux-pwm@...r.kernel.org>, <linux-riscv@...ts.infradead.org>,
        <linux-crypto@...r.kernel.org>, <linux-rtc@...r.kernel.org>,
        <linux-spi@...r.kernel.org>, <linux-usb@...r.kernel.org>
CC:     <krzysztof.kozlowski@...onical.com>, <geert@...ux-m68k.org>,
        <bin.meng@...driver.com>, <heiko@...ech.de>,
        <lewis.hanly@...rochip.com>, <conor.dooley@...rochip.com>,
        <daire.mcnamara@...rochip.com>, <ivan.griffin@...rochip.com>,
        <atish.patra@....com>
Subject: [PATCH v2 06/17] dt-bindings: rng: add bindings for microchip mpfs rng

From: Conor Dooley <conor.dooley@...rochip.com>

Add device tree bindings for the hardware rng device accessed via
the system services on the Microchip PolarFire SoC.

Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
---
 .../bindings/rng/microchip,mpfs-rng.yaml      | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml

diff --git a/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml
new file mode 100644
index 000000000000..32cbc37c9292
--- /dev/null
+++ b/Documentation/devicetree/bindings/rng/microchip,mpfs-rng.yaml
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/rng/microchip,mpfs-rng.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Microchip MPFS random number generator
+
+maintainers:
+  - Conor Dooley <conor.dooley@...rochip.com>
+
+description: |
+  The hardware random number generator on the Polarfire SoC is
+  accessed via the mailbox interface provided by the system controller
+
+properties:
+  compatible:
+    const: microchip,mpfs-rng
+
+required:
+  - compatible
+
+additionalProperties: false
+
+examples:
+  - |
+    hwrandom: hwrandom {
+        compatible = "microchip,mpfs-rng";
+    };
-- 
2.33.1