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Message-ID: <d5c996b7-9ac3-d7a9-4c21-307068afb84e@canonical.com>
Date: Fri, 17 Dec 2021 15:59:42 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: conor.dooley@...rochip.com, linus.walleij@...aro.org,
bgolaszewski@...libre.com, robh+dt@...nel.org,
jassisinghbrar@...il.com, paul.walmsley@...ive.com,
palmer@...belt.com, aou@...s.berkeley.edu, a.zummo@...ertech.it,
alexandre.belloni@...tlin.com, broonie@...nel.org,
gregkh@...uxfoundation.org, thierry.reding@...il.com,
u.kleine-koenig@...gutronix.de, lee.jones@...aro.org,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-i2c@...r.kernel.org,
linux-pwm@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-crypto@...r.kernel.org, linux-rtc@...r.kernel.org,
linux-spi@...r.kernel.org, linux-usb@...r.kernel.org
Cc: geert@...ux-m68k.org, bin.meng@...driver.com, heiko@...ech.de,
lewis.hanly@...rochip.com, daire.mcnamara@...rochip.com,
ivan.griffin@...rochip.com, atish.patra@....com
Subject: Re: [PATCH v2 14/17] riscv: dts: microchip: add fpga fabric section
to icicle kit
On 17/12/2021 10:33, conor.dooley@...rochip.com wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> Split the device tree for the Microchip MPFS into two sections by adding
> microchip-mpfs-fabric.dtsi, which contains peripherals contained in the
> FPGA fabric.
>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> .../boot/dts/microchip/microchip-mpfs-fabric.dtsi | 13 +++++++++++++
> .../dts/microchip/microchip-mpfs-icicle-kit.dts | 4 ++++
> arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi | 1 +
> 3 files changed, 18 insertions(+)
> create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
>
> diff --git a/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
> new file mode 100644
> index 000000000000..234c1f9bea40
> --- /dev/null
> +++ b/arch/riscv/boot/dts/microchip/microchip-mpfs-fabric.dtsi
> @@ -0,0 +1,13 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +/* Copyright (c) 2020-2021 Microchip Technology Inc */
> +
> +/ {
> + corePWM0: pwm@...00000 {
Lowercase labels please, so could be "core_pwm0".
Best regards,
Krzysztof
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