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Message-Id: <20211218141754.503661-1-dmitry.baryshkov@linaro.org>
Date:   Sat, 18 Dec 2021 17:17:53 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Andy Gross <agross@...nel.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>,
        Vinod Koul <vkoul@...nel.org>,
        Kishon Vijay Abraham I <kishon@...com>,
        Rob Herring <robh+dt@...nel.org>
Cc:     Philipp Zabel <p.zabel@...gutronix.de>,
        linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: [PATCH 0/2] phy: qcom-qmp: Add SM8450 PCIe1 PHY support

There are two different PCIe PHYs on SM8450, one having one lane (v5)
and another with two lanes (v5.20). This series adds support for the
second PCIe phy.

Prerequisites: SM8450 PCIe0 PHY support (accepted by Vinod)

----------------------------------------------------------------
Dmitry Baryshkov (2):
      dt-bindings: phy: qcom,qmp: Add SM8450 PCIe PHY bindings
      phy: qcom-qmp: Add SM8450 PCIe1 PHY support

 .../devicetree/bindings/phy/qcom,qmp-phy.yaml      |   2 +
 drivers/phy/qualcomm/phy-qcom-qmp.c                | 153 +++++++++++++++++++++
 drivers/phy/qualcomm/phy-qcom-qmp.h                |  70 ++++++++++
 3 files changed, 225 insertions(+)


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