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Message-ID: <20211218082802.5256-3-chunfeng.yun@mediatek.com>
Date: Sat, 18 Dec 2021 16:28:00 +0800
From: Chunfeng Yun <chunfeng.yun@...iatek.com>
To: Vinod Koul <vkoul@...nel.org>
CC: Chunfeng Yun <chunfeng.yun@...iatek.com>,
Kishon Vijay Abraham I <kishon@...com>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-phy@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
Eddie Hung <eddie.hung@...iatek.com>
Subject: [PATCH v2 3/5] phy: mediatek: add helpers to update bits of registers
Add three helpers mtk_phy_clear/set/update_bits() for registers operation
Signed-off-by: Chunfeng Yun <chunfeng.yun@...iatek.com>
---
v2: new patch, add register access helpers,
Add updatel() macro suggested by Vinod, here add more ones instead.
---
drivers/phy/mediatek/phy-mtk-io.h | 38 +++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 drivers/phy/mediatek/phy-mtk-io.h
diff --git a/drivers/phy/mediatek/phy-mtk-io.h b/drivers/phy/mediatek/phy-mtk-io.h
new file mode 100644
index 000000000000..500fcdab165d
--- /dev/null
+++ b/drivers/phy/mediatek/phy-mtk-io.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2021 MediaTek Inc.
+ *
+ * Author: Chunfeng Yun <chunfeng.yun@...iatek.com>
+ */
+
+#ifndef __PHY_MTK_H__
+#define __PHY_MTK_H__
+
+#include <linux/io.h>
+
+static inline void mtk_phy_clear_bits(void __iomem *reg, u32 bits)
+{
+ u32 tmp = readl(reg);
+
+ tmp &= ~bits;
+ writel(tmp, reg);
+}
+
+static inline void mtk_phy_set_bits(void __iomem *reg, u32 bits)
+{
+ u32 tmp = readl(reg);
+
+ tmp |= bits;
+ writel(tmp, reg);
+}
+
+static inline void mtk_phy_update_bits(void __iomem *reg, u32 mask, u32 val)
+{
+ u32 tmp = readl(reg);
+
+ tmp &= ~mask;
+ tmp |= val & mask;
+ writel(tmp, reg);
+}
+
+#endif
--
2.18.0
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