linux-kernel - Re: [PATCH v2 10/17] dt-bindings: spi: add bindings for microchip mpfs spi

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 20 Dec 2021 08:05:13 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <broonie@...nel.org>
CC:     <linus.walleij@...aro.org>, <bgolaszewski@...libre.com>,
        <robh+dt@...nel.org>, <jassisinghbrar@...il.com>,
        <paul.walmsley@...ive.com>, <palmer@...belt.com>,
        <aou@...s.berkeley.edu>, <a.zummo@...ertech.it>,
        <alexandre.belloni@...tlin.com>, <gregkh@...uxfoundation.org>,
        <thierry.reding@...il.com>, <u.kleine-koenig@...gutronix.de>,
        <lee.jones@...aro.org>, <linux-gpio@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-i2c@...r.kernel.org>, <linux-pwm@...r.kernel.org>,
        <linux-riscv@...ts.infradead.org>, <linux-crypto@...r.kernel.org>,
        <linux-rtc@...r.kernel.org>, <linux-spi@...r.kernel.org>,
        <linux-usb@...r.kernel.org>, <krzysztof.kozlowski@...onical.com>,
        <geert@...ux-m68k.org>, <bin.meng@...driver.com>,
        <heiko@...ech.de>, <Lewis.Hanly@...rochip.com>,
        <Daire.McNamara@...rochip.com>, <Ivan.Griffin@...rochip.com>,
        <atish.patra@....com>
Subject: Re: [PATCH v2 10/17] dt-bindings: spi: add bindings for microchip
 mpfs spi

On 17/12/2021 11:43, Mark Brown wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you 
know the content is safe
>
> On Fri, Dec 17, 2021 at 11:40:29AM +0000, Conor.Dooley@...rochip.com 
wrote:
>> On 17/12/2021 11:17, Mark Brown wrote:
>>> Why do you need this property in the DT - isn't the number of chip
>>> selects in the IP a fixes property?
>>
>> Nope! It's an IP that's intended for use in FPGAs so the number of
>> selects may (and does) vary based on implementation.
>
> That doesn't explain why the number is needed in the binding - why do
> you need this property in the DT?

Took another look at the IP core configuration & I think you're right 
and that property can be dropped. The register responsible for CS 
control will not be optimised away even if the CS is not used & the 
worst outcome is that nothing will happen.