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Date:   Mon, 20 Dec 2021 08:38:40 +0000
From:   John Garry <john.garry@...wei.com>
To:     Arnaldo Carvalho de Melo <acme@...nel.org>,
        Jin Yao <yao.jin@...ux.intel.com>
CC:     <peterz@...radead.org>, <mingo@...hat.com>, <mark.rutland@....com>,
        <alexander.shishkin@...ux.intel.com>, <jolsa@...hat.com>,
        <namhyung@...nel.org>, <irogers@...gle.com>,
        <kan.liang@...ux.intel.com>, <linux-perf-users@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] perf pmu: Fix event list for uncore PMUs

On 18/12/2021 01:47, Arnaldo Carvalho de Melo wrote:
>> Commit 0e0ae8742207 ("perf list: Display hybrid PMU events with cpu type")
>> changed the list for uncore PMUs, such that duplicate aliases are now
>> listed per PMU (which they should not be), like:
>>
>> ./perf list
>> ...
>> unc_cbo_cache_lookup.any_es
>> [Unit: uncore_cbox L3 Lookup any request that access cache and found
>> line in E or S-state]
>> unc_cbo_cache_lookup.any_es
>> [Unit: uncore_cbox L3 Lookup any request that access cache and found
>> line in E or S-state]
>> unc_cbo_cache_lookup.any_i
>> [Unit: uncore_cbox L3 Lookup any request that access cache and found
>> line in I-state]
>> unc_cbo_cache_lookup.any_i
>> [Unit: uncore_cbox L3 Lookup any request that access cache and found
>> line in I-state]
>> ...
>>
>> Notice how the events are listed twice.
> Hi Jin,
> 
> 	Can I have your acked-by/tested-by?

Hi Arnaldo,

I assume that address is bouncing for you also.

So if anyone else has one of these hybrid PMU x86 systems then it would 
be appreciated to check this change.

Thanks!

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