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Message-ID: <CA+SzRW6=C3X-i3kOqzhRZ-At49103L-dDi5dm70jbWEuVKjufA@mail.gmail.com>
Date: Mon, 20 Dec 2021 22:07:59 -0800
From: Ryder Lee <ryder.lee@...nel.org>
To: Sam Shih <sam.shih@...iatek.com>, Rob Herring <robh+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Chun-Jie Chen <chun-jie.chen@...iatek.com>,
Weiyi Lu <weiyi.lu@...iatek.com>,
Ikjoon Jang <ikjn@...omium.org>,
Miles Chen <miles.chen@...iatek.com>,
Enric Balletbo i Serra <enric.balletbo@...labora.com>,
Chen-Yu Tsai <wenst@...omium.org>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
John Crispin <john@...ozen.org>,
Ryder Lee <Ryder.Lee@...iatek.com>,
YH Chen <yh.chen@...iatek.com>
Subject: Re: [PATCH v7 0/3] Mediatek MT7986 basic clock support
On Mon, Dec 20, 2021 at 10:01 PM Ryder Lee <ryder.lee@...nel.org> wrote:
>
> On Fri, 2021-12-17 at 20:11 +0800, Sam Shih wrote:
> > This patch series add basic clock support for mediatek mt7986 SoC.
> > It is based on patch series "Add basic SoC support for mediatek
> > mt7986"
> >
> https://lore.kernel.org/all/20211018114009.13350-1-sam.shih@mediatek.com/
> > and "clk: mediatek: Add API for clock resource recycle"
> >
> https://lore.kernel.org/linux-arm-kernel/20210914021633.26377-5-chun-jie.chen@mediatek.com/
> > ---
> > v7: exclude DTS changes in the patch series
> > v5: used builtin_platform_driver instead of CLK_OF_DECLARE
> > follow recent clk-mt8195 clock patch series:
> >
> > https://lore.kernel.org/linux-arm-kernel/20210914021633.26377-1-chun-jie.chen@mediatek.com/
> >
> > v4:
> > According to the maintainer¡¦s suggestion, this patch splits the
> > previous
> > thread into independent patch series.
> > This patch include clock driver and device tree update
> >
> > Original thread:
> >
> https://lore.kernel.org/all/20210914085137.31761-1-sam.shih@mediatek.com/
> >
> https://lore.kernel.org/linux-arm-kernel/20210914085137.31761-2-sam.shih@mediatek.com/
> > ---
> >
> > Sam Shih (3):
> > dt-bindings: clock: mediatek: document clk bindings for mediatek
> > mt7986 SoC
> > clk: mediatek: add mt7986 clock IDs
> > clk: mediatek: add mt7986 clock support
> >
> > .../arm/mediatek/mediatek,apmixedsys.txt | 1 +
> > .../bindings/arm/mediatek/mediatek,ethsys.txt | 1 +
> > .../arm/mediatek/mediatek,infracfg.txt | 1 +
> > .../arm/mediatek/mediatek,sgmiisys.txt | 2 +
> > .../arm/mediatek/mediatek,topckgen.txt | 1 +
> > drivers/clk/mediatek/Kconfig | 17 +
> > drivers/clk/mediatek/Makefile | 4 +
> > drivers/clk/mediatek/clk-mt7986-apmixed.c | 100 +++++
> > drivers/clk/mediatek/clk-mt7986-eth.c | 132 +++++++
> > drivers/clk/mediatek/clk-mt7986-infracfg.c | 224 ++++++++++++
> > drivers/clk/mediatek/clk-mt7986-topckgen.c | 342
> > ++++++++++++++++++
> > include/dt-bindings/clock/mt7986-clk.h | 169 +++++++++
> > 12 files changed, 994 insertions(+)
> > create mode 100644 drivers/clk/mediatek/clk-mt7986-apmixed.c
> > create mode 100644 drivers/clk/mediatek/clk-mt7986-eth.c
> > create mode 100644 drivers/clk/mediatek/clk-mt7986-infracfg.c
> > create mode 100644 drivers/clk/mediatek/clk-mt7986-topckgen.c
> > create mode 100644 include/dt-bindings/clock/mt7986-clk.h
> >
ugh. Should be plain text mode for the previous mail.
For the series -
Reviewed-by: Ryder Lee <ryder.lee@...nel.org>
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