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Message-ID: <CAK8P3a2fBdh2kPDo8UGHBD0MhF5k_DoomqUaW+=ZOgksKmGg5A@mail.gmail.com>
Date: Tue, 21 Dec 2021 10:17:27 +0100
From: Arnd Bergmann <arnd@...db.de>
To: Xiongfeng Wang <wangxiongfeng2@...wei.com>
Cc: Will Deacon <will@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Mark Rutland <mark.rutland@....com>,
Peter Zijlstra <peterz@...radead.org>,
Jonathan Corbet <corbet@....net>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Yufeng Mo <moyufeng@...wei.com>,
linux-arch <linux-arch@...r.kernel.org>
Subject: Re: [PATCH v2] asm-generic: introduce io_stop_wc() and add
implementation for ARM64
On Tue, Dec 21, 2021 at 4:55 AM Xiongfeng Wang
<wangxiongfeng2@...wei.com> wrote:
>
> For memory accesses with write-combining attributes (e.g. those returned
> by ioremap_wc()), the CPU may wait for prior accesses to be merged with
> subsequent ones. But in some situation, such wait is bad for the
> performance.
>
> We introduce io_stop_wc() to prevent the merging of write-combining
> memory accesses before this macro with those after it.
>
> We add implementation for ARM64 using DGH instruction and provide NOP
> implementation for other architectures.
>
> Signed-off-by: Xiongfeng Wang <wangxiongfeng2@...wei.com>
> Suggested-by: Will Deacon <will@...nel.org>
> Suggested-by: Catalin Marinas <catalin.marinas@....com>
> ---
> v1->v2: change 'Normal-Non Cacheable' to 'write-combining'
For asm-generic:
Acked-by: Arnd Bergmann <arnd@...db.de>
Will, Catalin: if you are happy with this version, please merge it through the
arm64 tree.
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