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Message-ID: <CAPDyKFpGoa1QbGgjjaH_pDpqSLky+urE76AuA+vhGnmrb9pggQ@mail.gmail.com>
Date:   Tue, 21 Dec 2021 14:02:51 +0100
From:   Ulf Hansson <ulf.hansson@...aro.org>
To:     Yann Gautier <yann.gautier@...s.st.com>
Cc:     Marek Vasut <marex@...x.de>, linux-mmc@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        linux-stm32@...md-mailman.stormreply.com,
        linux-arm-kernel@...ts.infradead.org,
        Russell King <linux@...linux.org.uk>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Linus Walleij <linus.walleij@...aro.org>,
        Vladimir Zapolskiy <vz@...ia.com>,
        u.kleine-koenig@...gutronix.de,
        Christophe Kerello <christophe.kerello@...s.st.com>,
        Ludovic Barre <ludovic.barre@...s.st.com>
Subject: Re: [PATCH 3/4] mmc: mmci: stm32: clear DLYB_CR after sending tuning command

On Thu, 16 Dec 2021 at 10:49, Yann Gautier <yann.gautier@...s.st.com> wrote:
>
> On 12/16/21 10:13 AM, Marek Vasut wrote:
> > On 12/15/21 15:17, Yann Gautier wrote:
> >> During test campaign, and especially after several unbind/bind sequences,
> >> it has been seen that the SD-card on SDMMC1 thread could freeze.
> >> The freeze always appear on a CMD23 following a CMD19.
> >> Checking SDMMC internal registers shows that the tuning command (CMD19)
> >> has failed.
> >> The freeze is then due to the delay block involved in the tuning
> >> sequence.
> >> To correct this, clear the delay block register DLYB_CR register after
> >> the tuning commands.
> >>
> >> Signed-off-by: Christophe Kerello <christophe.kerello@...s.st.com>
> >> Signed-off-by: Yann Gautier <yann.gautier@...s.st.com>
> >> ---
> >>   drivers/mmc/host/mmci_stm32_sdmmc.c | 2 ++
> >>   1 file changed, 2 insertions(+)
> >>
> >> diff --git a/drivers/mmc/host/mmci_stm32_sdmmc.c
> >> b/drivers/mmc/host/mmci_stm32_sdmmc.c
> >> index fdaa11f92fe6..a75d3dd34d18 100644
> >> --- a/drivers/mmc/host/mmci_stm32_sdmmc.c
> >> +++ b/drivers/mmc/host/mmci_stm32_sdmmc.c
> >> @@ -441,6 +441,8 @@ static int sdmmc_dlyb_phase_tuning(struct
> >> mmci_host *host, u32 opcode)
> >>           return -EINVAL;
> >>       }
> >> +    writel_relaxed(0, dlyb->base + DLYB_CR);
> >> +
> >>       phase = end_of_len - max_len / 2;
> >>       sdmmc_dlyb_set_cfgr(dlyb, dlyb->unit, phase, false);
> >
> > Shouldn't this have a Fixes: tag and be CC stable ?
> > This seems like a bugfix, no ?
>
> Hi Marek,
>
> You're right, I should have added:
> Fixes: 1103f807a3b9 ("mmc: mmci_sdmmc: Add execute tuning with delay block")
>
> Ulf, could you manage that, or should I push a new version?

Patch applied for fixes and by adding a stable tag too, thanks!

Kind regards
Uffe

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