linux-kernel - [PATCH 09/11] PCI: mvebu: Update comment for PCI_EXP

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Message-Id: <20211221141455.30011-10-pali@kernel.org>
Date:   Tue, 21 Dec 2021 15:14:53 +0100
From:   Pali Rohár <pali@...nel.org>
To:     "Thomas Petazzoni" <thomas.petazzoni@...tlin.com>,
        "Lorenzo Pieralisi" <lorenzo.pieralisi@....com>,
        "Rob Herring" <robh@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        "Bjorn Helgaas" <bhelgaas@...gle.com>,
        Marek Behún <kabel@...nel.org>
Cc:     linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: [PATCH 09/11] PCI: mvebu: Update comment for PCI_EXP_LNKCAP register on emulated bridge

Reason for clearing this bit is because mvebu hw returns incorrectly this bit set to 1.

Signed-off-by: Pali Rohár <pali@...nel.org>
---
 drivers/pci/controller/pci-mvebu.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 94ef00b6d697..1aac65977b97 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -546,8 +546,8 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
 
 	case PCI_EXP_LNKCAP:
 		/*
-		 * PCIe requires the clock power management capability to be
-		 * hard-wired to zero for downstream ports
+		 * PCIe requires that the Clock Power Management capability bit
+		 * is hard-wired to zero for downstream ports but HW returns 1.
 		 */
 		*value = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP) &
 			 ~PCI_EXP_LNKCAP_CLKPM;
-- 
2.20.1