linux-kernel - Re: [PATCH] arm64: dts: qcom: sm8350: Correct UFS symbol clocks

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Message-ID: <YcL/0PUeAI6SJ86s@matsya>
Date:   Wed, 22 Dec 2021 16:07:04 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>
Cc:     Andy Gross <agross@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sm8350: Correct UFS symbol clocks

On 21-12-21, 16:26, Bjorn Andersson wrote:
> The introduction of '9a61f813fcc8 ("clk: qcom: regmap-mux: fix parent
> clock lookup")' broke UFS support on SM8350.
> 
> The cause for this is that the symbol clocks have a specified rate in
> the "freq-table-hz" table in the UFS node, which causes the UFS code to
> request a rate change, for which the "bi_tcxo" happens to provide the
> closest rate.  Prior to the change in regmap-mux it was determined
> (incorrectly) that no change was needed and everything worked. Instead
> mimic the configuration found in other platforms, by omitting the rate
> for the symbol clocks as well to avoid the rate change.
> 
> While at it also fill in the dummy symbol clocks that was dropped from
> the GCC driver as it was upstreamed.
> 
> Fixes: 59c7cf814783 ("arm64: dts: qcom: sm8350: Add UFS nodes")
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> ---
>  arch/arm64/boot/dts/qcom/sm8350.dtsi | 28 +++++++++++++++++++++++-----
>  1 file changed, 23 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> index bc176c252bca..ceb064a83038 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
> @@ -38,6 +38,24 @@ sleep_clk: sleep-clk {
>  			clock-frequency = <32000>;
>  			#clock-cells = <0>;
>  		};
> +
> +		ufs_phy_rx_symbol_0_clk: ufs-phy-rx-symbol-0 {
> +			compatible = "fixed-clock";
> +			clock-frequency = <1000>;
> +			#clock-cells = <0>;
> +		};
> +
> +		ufs_phy_rx_symbol_1_clk: ufs-phy-rx-symbol-1 {
> +			compatible = "fixed-clock";
> +			clock-frequency = <1000>;
> +			#clock-cells = <0>;
> +		};
> +
> +		ufs_phy_tx_symbol_0_clk: ufs-phy-tx-symbol-0 {
> +			compatible = "fixed-clock";
> +			clock-frequency = <1000>;
> +			#clock-cells = <0>;
> +		};
>  	};
>  
>  	cpus {
> @@ -606,9 +624,9 @@ gcc: clock-controller@...000 {
>  				 <0>,
>  				 <0>,
>  				 <0>,
> -				 <0>,
> -				 <0>,
> -				 <0>,
> +				 <&ufs_phy_rx_symbol_0_clk>,
> +				 <&ufs_phy_rx_symbol_1_clk>,
> +				 <&ufs_phy_tx_symbol_0_clk>,
>  				 <0>,
>  				 <0>;
>  		};
> @@ -2079,8 +2097,8 @@ ufs_mem_hc: ufshc@...4000 {
>  				<75000000 300000000>,
>  				<0 0>,
>  				<0 0>,
> -				<75000000 300000000>,
> -				<75000000 300000000>;
> +				<0 0>,
> +				<0 0>;

should the rate be zero here?

-- 
~Vinod