linux-kernel - Re: [PATCH 08/16] dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions

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Message-ID: <YcNtt4vloXXGwZe5@robh.at.kernel.org>
Date:   Wed, 22 Dec 2021 14:25:59 -0400
From:   Rob Herring <robh@...nel.org>
To:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc:     Rob Herring <robh+dt@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jakub Kicinski <kuba@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        Prabhakar <prabhakar.csengg@...il.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        linux-serial@...r.kernel.org, netdev@...r.kernel.org,
        Vinod Koul <vkoul@...nel.org>, devicetree@...r.kernel.org,
        Magnus Damm <magnus.damm@...il.com>, dmaengine@...r.kernel.org,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
        Stephen Boyd <sboyd@...nel.org>,
        linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
        Sergey Shtylyov <s.shtylyov@....ru>,
        Linus Walleij <linus.walleij@...aro.org>,
        Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH 08/16] dt-bindings: clock: Add R9A07G054 CPG Clock and
 Reset Definitions

On Tue, 21 Dec 2021 09:47:09 +0000, Lad Prabhakar wrote:
> From: Biju Das <biju.das.jz@...renesas.com>
> 
> Define RZ/V2L (R9A07G054) Clock Pulse Generator Core Clock and module
> clock outputs, as listed in Table 7.1.4.2 ("Clock List r1.0") and also
> add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
> ("Register configuration") of the RZ/V2L Hardware User's Manual (Rev.1.00,
> Nov.2021).
> 
> Signed-off-by: Biju Das <biju.das.jz@...renesas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
>  include/dt-bindings/clock/r9a07g054-cpg.h | 226 ++++++++++++++++++++++
>  1 file changed, 226 insertions(+)
>  create mode 100644 include/dt-bindings/clock/r9a07g054-cpg.h
> 

Acked-by: Rob Herring <robh@...nel.org>