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Message-ID: <CAMhs-H_dTkp6_1Loq973JqotW26GtRYQv-vdQ2i6Heo7oGCL3w@mail.gmail.com>
Date: Thu, 23 Dec 2021 07:10:22 +0100
From: Sergio Paracuellos <sergio.paracuellos@...il.com>
To: Bjorn Helgaas <helgaas@...nel.org>
Cc: linux-pci <linux-pci@...r.kernel.org>,
Fan Fei <ffclaire1224@...il.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Rob Herring <robh@...nel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-kernel-mentees@...ts.linuxfoundation.org,
Shuah Khan <skhan@...uxfoundation.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Matthias Brugger <matthias.bgg@...il.com>,
linux-arm-kernel@...ts.infradead.org,
"moderated list:ARM/Mediatek SoC support"
<linux-mediatek@...ts.infradead.org>
Subject: Re: [PATCH v2 17/23] PCI: mt7621: Rename mt7621_pci_ to mt7621_pcie_
Hi Bjorn,
On Thu, Dec 23, 2021 at 2:11 AM Bjorn Helgaas <helgaas@...nel.org> wrote:
>
> From: Bjorn Helgaas <bhelgaas@...gle.com>
>
> Rename mt7621_pci_* structs and functions to mt7621_pcie_* for consistency
> with the rest of the file.
>
> Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>
> Cc: Sergio Paracuellos <sergio.paracuellos@...il.com>
> Cc: Matthias Brugger <matthias.bgg@...il.com>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-mediatek@...ts.infradead.org
> ---
> drivers/pci/controller/pcie-mt7621.c | 36 ++++++++++++++--------------
> 1 file changed, 18 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/pci/controller/pcie-mt7621.c b/drivers/pci/controller/pcie-mt7621.c
> index 4138c0e83513..b8fea7afdb1b 100644
> --- a/drivers/pci/controller/pcie-mt7621.c
> +++ b/drivers/pci/controller/pcie-mt7621.c
> @@ -93,8 +93,8 @@ struct mt7621_pcie_port {
> * reset lines are inverted.
> */
> struct mt7621_pcie {
> - void __iomem *base;
> struct device *dev;
> + void __iomem *base;
This change is unrelated to the commit message and the rest of the
changes of this patch.
> struct list_head ports;
> bool resets_inverted;
> };
> @@ -129,7 +129,7 @@ static inline void pcie_port_write(struct mt7621_pcie_port *port,
> writel_relaxed(val, port->base + reg);
> }
>
> -static inline u32 mt7621_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
> +static inline u32 mt7621_pcie_get_cfgaddr(unsigned int bus, unsigned int slot,
> unsigned int func, unsigned int where)
> {
> return (((where & 0xf00) >> 8) << 24) | (bus << 16) | (slot << 11) |
> @@ -140,7 +140,7 @@ static void __iomem *mt7621_pcie_map_bus(struct pci_bus *bus,
> unsigned int devfn, int where)
> {
> struct mt7621_pcie *pcie = bus->sysdata;
> - u32 address = mt7621_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn),
> + u32 address = mt7621_pcie_get_cfgaddr(bus->number, PCI_SLOT(devfn),
> PCI_FUNC(devfn), where);
>
> writel_relaxed(address, pcie->base + RALINK_PCI_CONFIG_ADDR);
> @@ -148,7 +148,7 @@ static void __iomem *mt7621_pcie_map_bus(struct pci_bus *bus,
> return pcie->base + RALINK_PCI_CONFIG_DATA + (where & 3);
> }
>
> -static struct pci_ops mt7621_pci_ops = {
> +static struct pci_ops mt7621_pcie_ops = {
> .map_bus = mt7621_pcie_map_bus,
> .read = pci_generic_config_read,
> .write = pci_generic_config_write,
> @@ -156,7 +156,7 @@ static struct pci_ops mt7621_pci_ops = {
>
> static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
> {
> - u32 address = mt7621_pci_get_cfgaddr(0, dev, 0, reg);
> + u32 address = mt7621_pcie_get_cfgaddr(0, dev, 0, reg);
>
> pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
> return pcie_read(pcie, RALINK_PCI_CONFIG_DATA);
> @@ -165,7 +165,7 @@ static u32 read_config(struct mt7621_pcie *pcie, unsigned int dev, u32 reg)
> static void write_config(struct mt7621_pcie *pcie, unsigned int dev,
> u32 reg, u32 val)
> {
> - u32 address = mt7621_pci_get_cfgaddr(0, dev, 0, reg);
> + u32 address = mt7621_pcie_get_cfgaddr(0, dev, 0, reg);
>
> pcie_write(pcie, address, RALINK_PCI_CONFIG_ADDR);
> pcie_write(pcie, val, RALINK_PCI_CONFIG_DATA);
> @@ -505,16 +505,16 @@ static int mt7621_pcie_register_host(struct pci_host_bridge *host)
> {
> struct mt7621_pcie *pcie = pci_host_bridge_priv(host);
>
> - host->ops = &mt7621_pci_ops;
> + host->ops = &mt7621_pcie_ops;
> host->sysdata = pcie;
> return pci_host_probe(host);
> }
>
> -static const struct soc_device_attribute mt7621_pci_quirks_match[] = {
> +static const struct soc_device_attribute mt7621_pcie_quirks_match[] = {
> { .soc_id = "mt7621", .revision = "E2" }
> };
>
> -static int mt7621_pci_probe(struct platform_device *pdev)
> +static int mt7621_pcie_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> const struct soc_device_attribute *attr;
> @@ -535,7 +535,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
> platform_set_drvdata(pdev, pcie);
> INIT_LIST_HEAD(&pcie->ports);
>
> - attr = soc_device_match(mt7621_pci_quirks_match);
> + attr = soc_device_match(mt7621_pcie_quirks_match);
> if (attr)
> pcie->resets_inverted = true;
>
> @@ -572,7 +572,7 @@ static int mt7621_pci_probe(struct platform_device *pdev)
> return err;
> }
>
> -static int mt7621_pci_remove(struct platform_device *pdev)
> +static int mt7621_pcie_remove(struct platform_device *pdev)
> {
> struct mt7621_pcie *pcie = platform_get_drvdata(pdev);
> struct mt7621_pcie_port *port;
> @@ -583,18 +583,18 @@ static int mt7621_pci_remove(struct platform_device *pdev)
> return 0;
> }
>
> -static const struct of_device_id mt7621_pci_ids[] = {
> +static const struct of_device_id mt7621_pcie_ids[] = {
> { .compatible = "mediatek,mt7621-pci" },
> {},
> };
> -MODULE_DEVICE_TABLE(of, mt7621_pci_ids);
> +MODULE_DEVICE_TABLE(of, mt7621_pcie_ids);
>
> -static struct platform_driver mt7621_pci_driver = {
> - .probe = mt7621_pci_probe,
> - .remove = mt7621_pci_remove,
> +static struct platform_driver mt7621_pcie_driver = {
> + .probe = mt7621_pcie_probe,
> + .remove = mt7621_pcie_remove,
> .driver = {
> .name = "mt7621-pci",
> - .of_match_table = of_match_ptr(mt7621_pci_ids),
> + .of_match_table = of_match_ptr(mt7621_pcie_ids),
> },
> };
> -builtin_platform_driver(mt7621_pci_driver);
> +builtin_platform_driver(mt7621_pcie_driver);
> --
> 2.25.1
>
Other than that minor unrelated change, this looks good to me:
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@...il.com>
Best regards,
Sergio Paracuellos
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