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Message-ID: <YcwP1JeLETPd6dqK@shinobu>
Date:   Wed, 29 Dec 2021 16:35:48 +0900
From:   William Breathitt Gray <vilhelm.gray@...il.com>
To:     Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
Cc:     Lars-Peter Clausen <lars@...afoo.de>, kernel@...gutronix.de,
        Jonathan Cameron <Jonathan.Cameron@...wei.com>,
        linux-iio@...r.kernel.org,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        linux-kernel@...r.kernel.org,
        Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
        "Felipe Balbi (Intel)" <balbi@...nel.org>,
        Raymond Tan <raymond.tan@...el.com>
Subject: Re: [PATCH v2 08/23] counter: intel-qep: Convert to counter_priv()
 wrapper

On Mon, Dec 27, 2021 at 10:45:11AM +0100, Uwe Kleine-König wrote:
> This is a straight forward conversion to the new counter_priv() wrapper.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>

Acked-by: William Breathitt Gray <vilhelm.gray@...il.com>

> ---
>  drivers/counter/intel-qep.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/counter/intel-qep.c b/drivers/counter/intel-qep.c
> index 0924d16de6e2..8f84a48508ac 100644
> --- a/drivers/counter/intel-qep.c
> +++ b/drivers/counter/intel-qep.c
> @@ -109,7 +109,7 @@ static void intel_qep_init(struct intel_qep *qep)
>  static int intel_qep_count_read(struct counter_device *counter,
>  				struct counter_count *count, u64 *val)
>  {
> -	struct intel_qep *const qep = counter->priv;
> +	struct intel_qep *const qep = counter_priv(counter);
>  
>  	pm_runtime_get_sync(qep->dev);
>  	*val = intel_qep_readl(qep, INTEL_QEPCOUNT);
> @@ -176,7 +176,7 @@ static struct counter_synapse intel_qep_count_synapses[] = {
>  static int intel_qep_ceiling_read(struct counter_device *counter,
>  				  struct counter_count *count, u64 *ceiling)
>  {
> -	struct intel_qep *qep = counter->priv;
> +	struct intel_qep *qep = counter_priv(counter);
>  
>  	pm_runtime_get_sync(qep->dev);
>  	*ceiling = intel_qep_readl(qep, INTEL_QEPMAX);
> @@ -188,7 +188,7 @@ static int intel_qep_ceiling_read(struct counter_device *counter,
>  static int intel_qep_ceiling_write(struct counter_device *counter,
>  				   struct counter_count *count, u64 max)
>  {
> -	struct intel_qep *qep = counter->priv;
> +	struct intel_qep *qep = counter_priv(counter);
>  	int ret = 0;
>  
>  	/* Intel QEP ceiling configuration only supports 32-bit values */
> @@ -213,7 +213,7 @@ static int intel_qep_ceiling_write(struct counter_device *counter,
>  static int intel_qep_enable_read(struct counter_device *counter,
>  				 struct counter_count *count, u8 *enable)
>  {
> -	struct intel_qep *qep = counter->priv;
> +	struct intel_qep *qep = counter_priv(counter);
>  
>  	*enable = qep->enabled;
>  
> @@ -223,7 +223,7 @@ static int intel_qep_enable_read(struct counter_device *counter,
>  static int intel_qep_enable_write(struct counter_device *counter,
>  				  struct counter_count *count, u8 val)
>  {
> -	struct intel_qep *qep = counter->priv;
> +	struct intel_qep *qep = counter_priv(counter);
>  	u32 reg;
>  	bool changed;
>  
> @@ -256,7 +256,7 @@ static int intel_qep_spike_filter_ns_read(struct counter_device *counter,
>  					  struct counter_count *count,
>  					  u64 *length)
>  {
> -	struct intel_qep *qep = counter->priv;
> +	struct intel_qep *qep = counter_priv(counter);
>  	u32 reg;
>  
>  	pm_runtime_get_sync(qep->dev);
> @@ -277,7 +277,7 @@ static int intel_qep_spike_filter_ns_write(struct counter_device *counter,
>  					   struct counter_count *count,
>  					   u64 length)
>  {
> -	struct intel_qep *qep = counter->priv;
> +	struct intel_qep *qep = counter_priv(counter);
>  	u32 reg;
>  	bool enable;
>  	int ret = 0;
> @@ -326,7 +326,7 @@ static int intel_qep_preset_enable_read(struct counter_device *counter,
>  					struct counter_count *count,
>  					u8 *preset_enable)
>  {
> -	struct intel_qep *qep = counter->priv;
> +	struct intel_qep *qep = counter_priv(counter);
>  	u32 reg;
>  
>  	pm_runtime_get_sync(qep->dev);
> @@ -341,7 +341,7 @@ static int intel_qep_preset_enable_read(struct counter_device *counter,
>  static int intel_qep_preset_enable_write(struct counter_device *counter,
>  					 struct counter_count *count, u8 val)
>  {
> -	struct intel_qep *qep = counter->priv;
> +	struct intel_qep *qep = counter_priv(counter);
>  	u32 reg;
>  	int ret = 0;
>  
> -- 
> 2.33.0
> 

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