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Message-ID: <20cf2c1e-d55b-5780-8c6e-4d8beaca5a65@gmail.com>
Date: Thu, 30 Dec 2021 13:54:44 +0100
From: Matthias Brugger <matthias.bgg@...il.com>
To: Roger Lu <roger.lu@...iatek.com>,
Enric Balletbo Serra <eballetbo@...il.com>,
Kevin Hilman <khilman@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Nicolas Boichat <drinkcat@...gle.com>,
Stephen Boyd <sboyd@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>
Cc: Fan Chen <fan.chen@...iatek.com>,
HenryC Chen <HenryC.Chen@...iatek.com>,
YT Lee <yt.lee@...iatek.com>,
Xiaoqing Liu <Xiaoqing.Liu@...iatek.com>,
Charles Yang <Charles.Yang@...iatek.com>,
Angus Lin <Angus.Lin@...iatek.com>,
Mark Rutland <mark.rutland@....com>,
Nishanth Menon <nm@...com>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v16 2/7] arm64: dts: mt8183: add svs device information
On 28/04/2021 08:54, Roger Lu wrote:
> add compitable/reg/irq/clock/efuse setting in svs node
>
> Signed-off-by: Roger Lu <roger.lu@...iatek.com>
> ---
> arch/arm64/boot/dts/mediatek/mt8183.dtsi | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> index 80519a145f13..441d617ece43 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
> @@ -657,6 +657,18 @@
> status = "disabled";
> };
>
> + svs: svs@...0b000 {
> + compatible = "mediatek,mt8183-svs";
> + reg = <0 0x1100b000 0 0x1000>;
> + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
> + clocks = <&infracfg CLK_INFRA_THERM>;
> + clock-names = "main";
> + nvmem-cells = <&svs_calibration>,
> + <&thermal_calibration>;
> + nvmem-cell-names = "svs-calibration-data",
> + "t-calibration-data";
> + };
> +
> pwm0: pwm@...0e000 {
> compatible = "mediatek,mt8183-disp-pwm";
> reg = <0 0x1100e000 0 0x1000>;
> @@ -941,9 +953,15 @@
> reg = <0 0x11f10000 0 0x1000>;
> #address-cells = <1>;
> #size-cells = <1>;
Please add a new line between the different calibartion data, to improve
readability.
Regards,
Matthias
> + thermal_calibration: calib@180 {
> + reg = <0x180 0xc>;
> + };
> mipi_tx_calibration: calib@190 {
> reg = <0x190 0xc>;
> };
> + svs_calibration: calib@580 {
> + reg = <0x580 0x64>;
> + };
> };
>
> u3phy: usb-phy@...40000 {
>
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