| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20211231162309.257587-4-krzysztof.kozlowski@canonical.com>
Date: Fri, 31 Dec 2021 17:23:06 +0100
From: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
To: Tomasz Figa <tomasz.figa@...il.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
linux-arm-kernel@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Marek Szyprowski <m.szyprowski@...sung.com>,
Sylwester Nawrocki <snawrocki@...nel.org>,
Sam Protsenko <semen.protsenko@...aro.org>,
Chanho Park <chanho61.park@...sung.com>
Subject: [PATCH 21/24] ARM: dts: s3c24xx: align pinctrl with dtschema
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>
---
arch/arm/boot/dts/s3c2416-pinctrl.dtsi | 60 +++++++++++++-------------
1 file changed, 30 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi
index 92439ee5d7de..20a7d72827c2 100644
--- a/arch/arm/boot/dts/s3c2416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/s3c2416-pinctrl.dtsi
@@ -12,66 +12,66 @@ &pinctrl_0 {
* Pin banks
*/
- gpa: gpa {
+ gpa: gpa-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
- gpb: gpb {
+ gpb: gpb-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
- gpc: gpc {
+ gpc: gpc-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
- gpd: gpd {
+ gpd: gpd-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
- gpe: gpe {
+ gpe: gpe-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
- gpf: gpf {
+ gpf: gpf-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
- gpg: gpg {
+ gpg: gpg-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
- gph: gph {
+ gph: gph-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
- gpj: gpj {
+ gpj: gpj-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
- gpk: gpk {
+ gpk: gpk-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
- gpl: gpl {
+ gpl: gpl-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
- gpm: gpm {
+ gpm: gpm-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
};
@@ -80,92 +80,92 @@ gpm: gpm {
* Pin groups
*/
- uart0_data: uart0-data {
+ uart0_data: uart0-data-pins {
samsung,pins = "gph-0", "gph-1";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- uart0_fctl: uart0-fctl {
+ uart0_fctl: uart0-fctl-pins {
samsung,pins = "gph-8", "gph-9";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- uart1_data: uart1-data {
+ uart1_data: uart1-data-pins {
samsung,pins = "gph-2", "gph-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- uart1_fctl: uart1-fctl {
+ uart1_fctl: uart1-fctl-pins {
samsung,pins = "gph-10", "gph-11";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- uart2_data: uart2-data {
+ uart2_data: uart2-data-pins {
samsung,pins = "gph-4", "gph-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- uart2_fctl: uart2-fctl {
+ uart2_fctl: uart2-fctl-pins {
samsung,pins = "gph-6", "gph-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- uart3_data: uart3-data {
+ uart3_data: uart3-data-pins {
samsung,pins = "gph-6", "gph-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- extuart_clk: extuart-clk {
+ extuart_clk: extuart-clk-pins {
samsung,pins = "gph-12";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- i2c0_bus: i2c0-bus {
+ i2c0_bus: i2c0-bus-pins {
samsung,pins = "gpe-14", "gpe-15";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- spi0_bus: spi0-bus {
+ spi0_bus: spi0-bus-pins {
samsung,pins = "gpe-11", "gpe-12", "gpe-13";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- sd0_clk: sd0-clk {
+ sd0_clk: sd0-clk-pins {
samsung,pins = "gpe-5";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- sd0_cmd: sd0-cmd {
+ sd0_cmd: sd0-cmd-pins {
samsung,pins = "gpe-6";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- sd0_bus1: sd0-bus1 {
+ sd0_bus1: sd0-bus1-pins {
samsung,pins = "gpe-7";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- sd0_bus4: sd0-bus4 {
+ sd0_bus4: sd0-bus4-pins {
samsung,pins = "gpe-8", "gpe-9", "gpe-10";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- sd1_cmd: sd1-cmd {
+ sd1_cmd: sd1-cmd-pins {
samsung,pins = "gpl-8";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- sd1_clk: sd1-clk {
+ sd1_clk: sd1-clk-pins {
samsung,pins = "gpl-9";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- sd1_bus1: sd1-bus1 {
+ sd1_bus1: sd1-bus1-pins {
samsung,pins = "gpl-0";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
- sd1_bus4: sd1-bus4 {
+ sd1_bus4: sd1-bus4-pins {
samsung,pins = "gpl-1", "gpl-2", "gpl-3";
samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
};
--
2.32.0
Powered by blists - more mailing lists