lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <69ad949e-4788-0f93-46cb-6af6f79a9f24@gmail.com>
Date:   Fri, 31 Dec 2021 12:00:37 +0800
From:   Like Xu <like.xu.linux@...il.com>
To:     Sean Christopherson <seanjc@...gle.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>,
        Jim Mattson <jmattson@...gle.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Joerg Roedel <joro@...tes.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Like Xu <likexu@...cent.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v11 01/17] perf/x86/intel: Add EPT-Friendly PEBS for Ice
 Lake Server

On 31/12/2021 2:13 am, Sean Christopherson wrote:
> On Fri, Dec 10, 2021, Like Xu wrote:
>> From: Like Xu <like.xu@...ux.intel.com>
>>
>> From: Like Xu <like.xu@...ux.intel.com>
> 
> Did one of these get handcoded?

Uh, now I have found the use of "--from=<ident>".

> 
>> The new hardware facility supporting guest PEBS is only available on
>> Intel Ice Lake Server platforms for now. KVM will check this field
>> through perf_get_x86_pmu_capability() instead of hard coding the cpu
>> models in the KVM code. If it is supported, the guest PEBS capability
>> will be exposed to the guest.
> 
> So what exactly is this new feature?  I've speed read the cover letter and a few
> changelogs and didn't find anything that actually explained when this feature does.
> 

Please check Intel SDM Vol3 18.9.5 for this "EPT-Friendly PEBS" feature.

I assume when an unfamiliar feature appears in the patch SUBJECT,
the reviewer may search for the exact name in the specification.

> Based on the shortlog, I assume the feature handles translating linear addresses
> via EPT?  If that's correct, then x86_pmu.pebs_vmx should be named something like
> x86_pmu.pebs_ept.

"Translating linear addresses via EPT" is only part of the hardware implementation,
and we may apply the new name if there are no other objections.

> 
> That also raises the question of what will happen if EPT is disabled.  Presumably
> things will Just Work since no additional translation is needed, but if that's the
> case then arguably vmx_pebs_supported() should be:
> 
> 	return boot_cpu_has(X86_FEATURE_PEBS) &&
> 	       (!tdp_enabled || kvm_pmu_cap.pebs_vmx);

Yes, a similar fix is already on my private tree, and thank you for pointing it out!

> 
> I'm guessing no one actually cares about supporting PEBS on older CPUs using shadow
> paging, but the changelog should at least call out that PEBS is allowed if and only
> if "pebs_vmx" is supported for simplicity, even though it would actually work if EPT
> is disabled.  And if for some reason it _doesn't_ work when EPT is disabled, then
> vmx_pebs_supported() and friends need to actually check tdp_enabled.

Yes, the guest PEBS only works when EPT is enabled on the newer modern CPUs.

> 
> Regardless, this changelog really, really needs an explanation of the feature.

Thank you for picking up, I will update the changelog for this commit.

Please let me know if you have any more obstacles or niggles to review this 
patch set.

Thanks,
Like Xu

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ