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Message-Id: <20220103143712.46675-1-angelogioacchino.delregno@collabora.com>
Date: Mon, 3 Jan 2022 15:37:11 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: mturquette@...libre.com
Cc: sboyd@...nel.org, matthias.bgg@...il.com,
angelogioacchino.delregno@...labora.com, miles.chen@...iatek.com,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, kernel@...labora.com
Subject: [PATCH 1/2] clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
Add a clockgating bit check helper and use it in functions
mtk_cg_bit_is_cleared(), mtk_cg_bit_is_set() to shrink the
file size.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
---
drivers/clk/mediatek/clk-gate.c | 18 +++++++-----------
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c
index b02d2f74dd0d..957fa1d68f07 100644
--- a/drivers/clk/mediatek/clk-gate.c
+++ b/drivers/clk/mediatek/clk-gate.c
@@ -16,28 +16,24 @@
#include "clk-mtk.h"
#include "clk-gate.h"
-static int mtk_cg_bit_is_cleared(struct clk_hw *hw)
+static u32 mtk_get_clockgating(struct clk_hw *hw)
{
struct mtk_clk_gate *cg = to_mtk_clk_gate(hw);
u32 val;
regmap_read(cg->regmap, cg->sta_ofs, &val);
- val &= BIT(cg->bit);
+ return val & BIT(cg->bit);
+}
- return val == 0;
+static int mtk_cg_bit_is_cleared(struct clk_hw *hw)
+{
+ return mtk_get_clockgating(hw) == 0;
}
static int mtk_cg_bit_is_set(struct clk_hw *hw)
{
- struct mtk_clk_gate *cg = to_mtk_clk_gate(hw);
- u32 val;
-
- regmap_read(cg->regmap, cg->sta_ofs, &val);
-
- val &= BIT(cg->bit);
-
- return val != 0;
+ return mtk_get_clockgating(hw) != 0;
}
static void mtk_cg_set_bit(struct clk_hw *hw)
--
2.33.1
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