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Message-ID: <YdPjbGXwa/YEd38G@google.com>
Date: Mon, 3 Jan 2022 22:04:28 -0800
From: Dmitry Torokhov <dmitry.torokhov@...il.com>
To: Paul Menzel <pmenzel@...gen.mpg.de>
Cc: Damien Le Moal <damien.lemoal@...nsource.wdc.com>,
linux-ide@...r.kernel.org, Guenter Roeck <groeck@...omium.org>,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/3] ahci: AMD A85 FCH (Hudson D4): Skip 200 ms
debounce delay in `sata_link_resume()`
Hi Paul,
On Wed, Dec 29, 2021 at 05:11:18PM +0100, Paul Menzel wrote:
>
> Add the two Chromium OS developers Dmitry and Guenter to Cc, as to my
> knowledge Chromium/Chrome OS also tries to boot very fast, and the Chromium
> project has some CI infrastructure.
I am not sure if we can be of use here as Chrome OS devices are using
either eMMC or NVME for storage. I do not recall devices using AHCI,
maybe some very old ones way past EOL.
Thanks.
--
Dmitry
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