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Message-ID: <CAG3jFyvUcGgELW=N4OXwU_SVtV9YpyKQynTj2Oz77P_C1YMOkg@mail.gmail.com>
Date: Wed, 5 Jan 2022 18:51:07 +0100
From: Robert Foss <robert.foss@...aro.org>
To: Miaoqian Lin <linmq006@...il.com>
Cc: Andrzej Hajda <a.hajda@...sung.com>,
Neil Armstrong <narmstrong@...libre.com>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Jonas Karlman <jonas@...boo.se>,
Jernej Skrabec <jernej.skrabec@...il.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Fabio Estevam <festevam@...il.com>,
Guido Günther <agx@...xcpu.org>,
Robert Chiras <robert.chiras@....com>,
Sam Ravnborg <sam@...nborg.org>,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/bridge: nwl-dsi: Fix PM disable depth imbalance in nwl_dsi_probe
Hey Miaoqian,
Thanks for submitting this patch!
On Wed, 5 Jan 2022 at 11:48, Miaoqian Lin <linmq006@...il.com> wrote:
>
> The pm_runtime_enable will increase power disable depth.
> Thus a pairing decrement is needed on the error handling
> path to keep it balanced according to context.
>
> Fixes: 44cfc62 ("drm/bridge: Add NWL MIPI DSI host controller support")
In the future, please use 12 chars of the hash. I'll fix it this time,
but please use 12 characters going forward.
> Signed-off-by: Miaoqian Lin <linmq006@...il.com>
> ---
> drivers/gpu/drm/bridge/nwl-dsi.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
> index a7389a0facfb..fc3ad9fab867 100644
> --- a/drivers/gpu/drm/bridge/nwl-dsi.c
> +++ b/drivers/gpu/drm/bridge/nwl-dsi.c
> @@ -1206,6 +1206,7 @@ static int nwl_dsi_probe(struct platform_device *pdev)
>
> ret = nwl_dsi_select_input(dsi);
> if (ret < 0) {
> + pm_runtime_disable(dev);
> mipi_dsi_host_unregister(&dsi->dsi_host);
> return ret;
> }
> --
> 2.17.1
>
Fixed commit hash length, added my r-b and applied to drm-misc-next.
Reviewed-by: Robert Foss <robert.foss@...aro.org>
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