linux-kernel - RE: DEMO VERSION! [PATCH] PCI: dwc: Fix integrated MSI Receiver mask reg setting during resume

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Message-ID: <AS8PR04MB867645954BE452781458B80F8C4C9@AS8PR04MB8676.eurprd04.prod.outlook.com>
Date:   Thu, 6 Jan 2022 07:23:02 +0000
From:   Hongxing Zhu <hongxing.zhu@....com>
To:     Jisheng Zhang <jszhang@...nel.org>,
        Jingoo Han <jingoohan1@...il.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>
CC:     "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: DEMO VERSION! [PATCH] PCI: dwc: Fix integrated MSI Receiver mask
 reg setting during resume

> -----Original Message-----
> From: Jisheng Zhang <jszhang@...nel.org>
> Sent: Sunday, December 26, 2021 3:40 PM
> To: Jingoo Han <jingoohan1@...il.com>; Gustavo Pimentel
> <gustavo.pimentel@...opsys.com>; Lorenzo Pieralisi
> <lorenzo.pieralisi@....com>; Rob Herring <robh@...nel.org>; Krzysztof
> Wilczyński <kw@...ux.com>; Bjorn Helgaas <bhelgaas@...gle.com>
> Cc: linux-pci@...r.kernel.org; linux-kernel@...r.kernel.org
> Subject: [PATCH] PCI: dwc: Fix integrated MSI Receiver
> mask reg setting during resume
> 
> If the host which makes use of the IP's integrated MSI Receiver losts
> power during suspend, we call dw_pcie_setup_rc() to reinit the RC. But
> dw_pcie_setup_rc() always set the pp->irq_mask[ctrl] as ~0, so the mask
> register is always set as 0xffffffff incorrectly, thus the MSI can't work after
> resume.
> 
> Fix this issue by moving pp->irq_mask[ctrl] initialization to
> dw_pcie_host_init(), so we can correctly set the mask reg during both
> boot and resume.
> 
> Signed-off-by: Jisheng Zhang <jszhang@...nel.org>
[Richard Zhu] Hi Jisheng:
Based on i.MX8MQ and Marvell WIFI module, the MSI works fine after resume.
Thanks for your patch.
Tested-by: Richard Zhu <hongxing.zhu@....com>

Best Regards
Richard Zhu

> ---
>  drivers/pci/controller/dwc/pcie-designware-host.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c
> b/drivers/pci/controller/dwc/pcie-designware-host.c
> index f4755f3a03be..2fa86f32d964 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -362,6 +362,12 @@ int dw_pcie_host_init(struct pcie_port *pp)
>  			if (ret < 0)
>  				return ret;
>  		} else if (pp->has_msi_ctrl) {
> +			u32 ctrl, num_ctrls;
> +
> +			num_ctrls = pp->num_vectors /
> MAX_MSI_IRQS_PER_CTRL;
> +			for (ctrl = 0; ctrl < num_ctrls; ctrl++)
> +				pp->irq_mask[ctrl] = ~0;
> +
>  			if (!pp->msi_irq) {
>  				pp->msi_irq =
> platform_get_irq_byname_optional(pdev, "msi");
>  				if (pp->msi_irq < 0) {
> @@ -541,7 +547,6 @@ void dw_pcie_setup_rc(struct pcie_port *pp)
> 
>  		/* Initialize IRQ Status array */
>  		for (ctrl = 0; ctrl < num_ctrls; ctrl++) {
> -			pp->irq_mask[ctrl] = ~0;
>  			dw_pcie_writel_dbi(pci, PCIE_MSI_INTR0_MASK +
>  					    (ctrl * MSI_REG_CTRL_BLOCK_SIZE),
>  					    pp->irq_mask[ctrl]);
> --
> 2.34.1