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Message-Id: <20220107015922.DB4E8C36AE0@smtp.kernel.org>
Date: Thu, 06 Jan 2022 17:59:21 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Ajit Kumar Pandey <AjitKumar.Pandey@....com>,
linux-clk@...r.kernel.org
Cc: Vijendar.Mukunda@....com, Alexander.Deucher@....com,
Basavaraj.Hiregoudar@....com, Sunil-kumar.Dommati@....com,
Mario.Limonciello@....com,
Ajit Kumar Pandey <AjitKumar.Pandey@....com>,
Michael Turquette <mturquette@...libre.com>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 5/5] clk: x86: Fix clk_gate_flags for RV_CLK_GATE
Quoting Ajit Kumar Pandey (2021-12-12 10:05:27)
> In newer SoC we have to clear bit for disabling 48MHz oscillator
> clock gate. Remove CLK_GATE_SET_TO_DISABLE flag for proper enable
> and disable of 48MHz clock.
>
> Signed-off-by: Ajit Kumar Pandey <AjitKumar.Pandey@....com>
> Reviewed-by: Mario Limonciello <Mario.Limonciello@....com>
> ---
Applied to clk-next
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