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Message-ID: <CADRPPNRe=qgH0n2XMTEro2+dYXcz82x=PcvhjiPX1GRGkkbfjg@mail.gmail.com>
Date:   Fri, 7 Jan 2022 10:25:46 +0800
From:   Li Yang <leoyang.li@....com>
To:     wangborong@...rlc.com
Cc:     linuxppc-dev <linuxppc-dev@...ts.ozlabs.org>,
        lkml <linux-kernel@...r.kernel.org>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>,
        Zhao Qiang <qiang.zhao@....com>
Subject: Re: [PATCH] soc: fsl: qe: fix typo in a comment

On Sat, Dec 11, 2021 at 5:12 PM Jason Wang <wangborong@...rlc.com> wrote:
>
> The double `is' in the comment in line 150 is repeated. Remove one
> of them from the comment.

Looks like you also removed a redundant tab in a new line.  We
probably can squeeze this trivial cleanup in, but we need to mention
it.

>
> Signed-off-by: Jason Wang <wangborong@...rlc.com>

Applied for next with commit message updated.

> ---
>  drivers/soc/fsl/qe/qe.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
> index 4d38c80f8be8..b3c226eb5292 100644
> --- a/drivers/soc/fsl/qe/qe.c
> +++ b/drivers/soc/fsl/qe/qe.c
> @@ -147,7 +147,7 @@ EXPORT_SYMBOL(qe_issue_cmd);
>   * memory mapped space.
>   * The BRG clock is the QE clock divided by 2.
>   * It was set up long ago during the initial boot phase and is
> - * is given to us.
> + * given to us.
>   * Baud rate clocks are zero-based in the driver code (as that maps
>   * to port numbers). Documentation uses 1-based numbering.
>   */
> @@ -421,7 +421,7 @@ static void qe_upload_microcode(const void *base,
>
>         for (i = 0; i < be32_to_cpu(ucode->count); i++)
>                 iowrite32be(be32_to_cpu(code[i]), &qe_immr->iram.idata);
> -
> +
>         /* Set I-RAM Ready Register */
>         iowrite32be(QE_IRAM_READY, &qe_immr->iram.iready);
>  }
> --
> 2.34.1
>

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