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Message-Id: <20220107023451.7C52CC36AEB@smtp.kernel.org>
Date: Thu, 06 Jan 2022 18:34:50 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Chen-Yu Tsai <wenst@...omium.org>,
Chun-Jie Chen <chun-jie.chen@...iatek.com>
Cc: Matthias Brugger <matthias.bgg@...il.com>,
Nicolas Boichat <drinkcat@...omium.org>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org, linux-clk@...r.kernel.org,
srv_heupstream@...iatek.com,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [v1] clk: mediatek: use en_mask as a pure div_en_mask
Quoting Chen-Yu Tsai (2021-11-09 22:59:37)
> Hi,
>
> On Wed, Nov 10, 2021 at 10:23 AM Chun-Jie Chen
> <chun-jie.chen@...iatek.com> wrote:
> >
> > We no longer allow en_mask to be a combination of
> > pll_en_bit and div_en_mask, so remove pll_en_bit(bit0)
> > from en_mask to make en_mask a pure en_mask that only
> > used for pll dividers.
>
> AFAICT this looks like it continues the work done in commit 7cc4e1bbe300
> ("clk: mediatek: Fix asymmetrical PLL enable and disable control") and
> commit f384c44754b7 ("clk: mediatek: Add configurable enable control to
> mtk_pll_data").
>
> It would be nice if you could mention this in your commit log to provide
> more context.
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