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Message-Id: <20220107015858.BE163C36AE0@smtp.kernel.org>
Date: Thu, 06 Jan 2022 17:58:57 -0800
From: Stephen Boyd <sboyd@...nel.org>
To: Ajit Kumar Pandey <AjitKumar.Pandey@....com>,
linux-clk@...r.kernel.org
Cc: Vijendar.Mukunda@....com, Alexander.Deucher@....com,
Basavaraj.Hiregoudar@....com, Sunil-kumar.Dommati@....com,
Mario.Limonciello@....com,
Ajit Kumar Pandey <AjitKumar.Pandey@....com>,
Michael Turquette <mturquette@...libre.com>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 1/5] x86: clk: clk-fch: Add support for newer family of AMD's SOC
Quoting Ajit Kumar Pandey (2021-12-12 10:05:23)
> FCH controller clock configuration slightly differs across AMD's
> SOC architectures. Newer family of SOC only support a 48MHz fix
> clock while stoney SOC family has a clk_mux to choose 48MHz and
> 25 MHz clk. At present fixed clk support is only enabled for RV
> architecture using "is-rv" device property initialized from boot
> loader. This limit 48MHz fixed clock gate support to RV platform
> unless we add similar device property in boot loader for other
> architectures.
>
> Add pci_device_id table with Stoney platform id and replace "is-rv"
> device property check with pci id match to add clk mux support with
> 25MHz and 48MHz clk support based on clk mux selection. This enable
> 48Mhz fixed fch clock support by default on all newer SOC's except
> stoney. Also replace RV with FIXED as a generic naming conventions
> across all platforms and changed module description.
>
> Signed-off-by: Ajit Kumar Pandey <AjitKumar.Pandey@....com>
> Reviewed-by: Mario Limonciello <Mario.Limonciello@....com>
> ---
Applied to clk-next
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