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Date: Sun, 9 Jan 2022 18:29:57 +0100 From: Jonathan Neuschäfer <j.neuschaefer@....net> To: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org Cc: Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh+dt@...nel.org>, openbmc@...ts.ozlabs.org, Tomer Maimon <tmaimon77@...il.com>, Joel Stanley <joel@....id.au>, linux-kernel@...r.kernel.org, Andy Shevchenko <andy.shevchenko@...il.com>, Avi Fishman <avifishman70@...il.com>, Tali Perry <tali.perry1@...il.com>, Patrick Venture <venture@...gle.com>, Nancy Yuen <yuenn@...gle.com>, Benjamin Fair <benjaminfair@...gle.com>, Jonathan Neuschäfer <j.neuschaefer@....net> Subject: [PATCH v4 6/9] ARM: dts: wpcm450: Add pinctrl and GPIO nodes This patch adds the pin controller and GPIO banks to the devicetree for the WPCM450 SoC. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@....net> Reviewed-by: Linus Walleij <linus.walleij@...aro.org> --- v4: - no changes v3: - Add Linus' R-b tag - Remove nuvoton,interrupt-map again, to simplify the binding - Make tuples clearer v2: - https://lore.kernel.org/lkml/20211207210823.1975632-7-j.neuschaefer@gmx.net/ - Move GPIO banks into subnodes - Add /alias/gpio* v1: - https://lore.kernel.org/lkml/20210602120329.2444672-7-j.neuschaefer@gmx.net/ --- arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 72 ++++++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index a17ee70085dd0..66c35626c80a6 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -8,6 +8,17 @@ / { #address-cells = <1>; #size-cells = <1>; + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + gpio4 = &gpio4; + gpio5 = &gpio5; + gpio6 = &gpio6; + gpio7 = &gpio7; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -77,5 +88,66 @@ aic: interrupt-controller@...02000 { interrupt-controller; #interrupt-cells = <2>; }; + + pinctrl: pinctrl@...03000 { + compatible = "nuvoton,wpcm450-pinctrl"; + reg = <0xb8003000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + gpio0: gpio@0 { + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>, + <3 IRQ_TYPE_LEVEL_HIGH>, + <4 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + }; + + gpio1: gpio@1 { + reg = <1>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + }; + + gpio2: gpio@2 { + reg = <2>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio3: gpio@3 { + reg = <3>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio4: gpio@4 { + reg = <4>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio5: gpio@5 { + reg = <5>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio6: gpio@6 { + reg = <6>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio7: gpio@7 { + reg = <7>; + gpio-controller; + #gpio-cells = <2>; + }; + }; }; }; -- 2.30.2
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