[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <159e2406-4f1b-9ade-8daa-51d8eb055394@collabora.com>
Date: Mon, 10 Jan 2022 16:49:30 +0100
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Chun-Jie Chen <chun-jie.chen@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Stephen Boyd <sboyd@...nel.org>,
Nicolas Boichat <drinkcat@...omium.org>,
Rob Herring <robh+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-mediatek@...ts.infradead.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, srv_heupstream@...iatek.com,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [v1 13/16] clk: mediatek: Add MT8186 vencsys clock support
Il 10/01/22 14:44, Chun-Jie Chen ha scritto:
> Add MT8186 vencsys clock controller which provide clock gate
> control for video encoder.
>
> Signed-off-by: Chun-Jie Chen <chun-jie.chen@...iatek.com>
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Powered by blists - more mailing lists