linux-kernel - Re: [PATCH v2 13/35] brcmfmac: pcie: Support PCIe core revisions >= 64

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 10 Jan 2022 08:31:12 +0100
From:   Arend van Spriel <arend.vanspriel@...adcom.com>
To:     Hector Martin <marcan@...can.st>,
        Kalle Valo <kvalo@...eaurora.org>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        "Rafael J. Wysocki" <rafael@...nel.org>,
        Len Brown <lenb@...nel.org>,
        Arend van Spriel <aspriel@...il.com>,
        Franky Lin <franky.lin@...adcom.com>,
        Hante Meuleman <hante.meuleman@...adcom.com>,
        Chi-hsien Lin <chi-hsien.lin@...ineon.com>,
        Wright Feng <wright.feng@...ineon.com>,
        Dmitry Osipenko <digetx@...il.com>
Cc:     Sven Peter <sven@...npeter.dev>,
        Alyssa Rosenzweig <alyssa@...enzweig.io>,
        Mark Kettenis <kettenis@...nbsd.org>,
        Rafał Miłecki <zajec5@...il.com>,
        Pieter-Paul Giesberts <pieter-paul.giesberts@...adcom.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Hans de Goede <hdegoede@...hat.com>,
        "John W. Linville" <linville@...driver.com>,
        "brian m. carlson" <sandals@...stytoothpaste.net>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        linux-wireless@...r.kernel.org, netdev@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-acpi@...r.kernel.org, brcm80211-dev-list.pdl@...adcom.com,
        SHA-cyfmac-dev-list@...ineon.com
Subject: Re: [PATCH v2 13/35] brcmfmac: pcie: Support PCIe core revisions >=
 64

On 1/4/2022 8:26 AM, Hector Martin wrote:
> These newer PCIe core revisions include new sets of registers that must
> be used instead of the legacy ones. Introduce a brcmf_pcie_reginfo to
> hold the specific register offsets and values to use for a given
> platform, and change all the register accesses to indirect through it.

Reviewed-by: Arend van Spriel <arend.vanspriel@...adcom.com>
> Reviewed-by: Linus Walleij <linus.walleij@...aro.org>
> Signed-off-by: Hector Martin <marcan@...can.st>
> ---
>   .../broadcom/brcm80211/brcmfmac/pcie.c        | 125 +++++++++++++++---
>   1 file changed, 105 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
> index 595815164e18..f3744e806157 100644
> --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
> +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c
> @@ -118,6 +118,12 @@ static const struct brcmf_firmware_mapping brcmf_pcie_fwnames[] = {
>   #define BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_0	0x140
>   #define BRCMF_PCIE_PCIE2REG_H2D_MAILBOX_1	0x144
>   
> +#define BRCMF_PCIE_64_PCIE2REG_INTMASK		0xC14
> +#define BRCMF_PCIE_64_PCIE2REG_MAILBOXINT	0xC30
> +#define BRCMF_PCIE_64_PCIE2REG_MAILBOXMASK	0xC34
> +#define BRCMF_PCIE_64_PCIE2REG_H2D_MAILBOX_0	0xA20
> +#define BRCMF_PCIE_64_PCIE2REG_H2D_MAILBOX_1	0xA24
> +
>   #define BRCMF_PCIE2_INTA			0x01
>   #define BRCMF_PCIE2_INTB			0x02
>   
> @@ -137,6 +143,8 @@ static const struct brcmf_firmware_mapping brcmf_pcie_fwnames[] = {
>   #define	BRCMF_PCIE_MB_INT_D2H3_DB0		0x400000
>   #define	BRCMF_PCIE_MB_INT_D2H3_DB1		0x800000
>   
> +#define BRCMF_PCIE_MB_INT_FN0			(BRCMF_PCIE_MB_INT_FN0_0 | \
> +						 BRCMF_PCIE_MB_INT_FN0_1)
>   #define BRCMF_PCIE_MB_INT_D2H_DB		(BRCMF_PCIE_MB_INT_D2H0_DB0 | \
>   						 BRCMF_PCIE_MB_INT_D2H0_DB1 | \
>   						 BRCMF_PCIE_MB_INT_D2H1_DB0 | \
> @@ -146,6 +154,40 @@ static const struct brcmf_firmware_mapping brcmf_pcie_fwnames[] = {
>   						 BRCMF_PCIE_MB_INT_D2H3_DB0 | \
>   						 BRCMF_PCIE_MB_INT_D2H3_DB1)
>   
> +#define	BRCMF_PCIE_64_MB_INT_D2H0_DB0		0x1
> +#define	BRCMF_PCIE_64_MB_INT_D2H0_DB1		0x2
> +#define	BRCMF_PCIE_64_MB_INT_D2H1_DB0		0x4
> +#define	BRCMF_PCIE_64_MB_INT_D2H1_DB1		0x8
> +#define	BRCMF_PCIE_64_MB_INT_D2H2_DB0		0x10
> +#define	BRCMF_PCIE_64_MB_INT_D2H2_DB1		0x20
> +#define	BRCMF_PCIE_64_MB_INT_D2H3_DB0		0x40
> +#define	BRCMF_PCIE_64_MB_INT_D2H3_DB1		0x80

Just an observation. So these are legacy ones with a 16 bit right shift...

> +#define	BRCMF_PCIE_64_MB_INT_D2H4_DB0		0x100
> +#define	BRCMF_PCIE_64_MB_INT_D2H4_DB1		0x200
> +#define	BRCMF_PCIE_64_MB_INT_D2H5_DB0		0x400
> +#define	BRCMF_PCIE_64_MB_INT_D2H5_DB1		0x800
> +#define	BRCMF_PCIE_64_MB_INT_D2H6_DB0		0x1000
> +#define	BRCMF_PCIE_64_MB_INT_D2H6_DB1		0x2000
> +#define	BRCMF_PCIE_64_MB_INT_D2H7_DB0		0x4000
> +#define	BRCMF_PCIE_64_MB_INT_D2H7_DB1		0x8000

...and these are new doorbell interrupts.

Download attachment "smime.p7s" of type "application/pkcs7-signature" (4219 bytes)