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Message-ID: <CAOnJCUJ6JNY9eWrPhGi3XK3omDwXhM37oimsZoqxbOP_f7vUog@mail.gmail.com>
Date:   Tue, 11 Jan 2022 10:45:56 -0800
From:   Atish Patra <atishp@...shpatra.org>
To:     Jessica Clarke <jrtc27@...c27.com>
Cc:     Nikita Shubin <nikita.shubin@...uefel.me>,
        Atish Patra <atishp@...osinc.com>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        linux <linux@...ro.com>, Nikita Shubin <n.shubin@...ro.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Kajol Jain <kjain@...ux.ibm.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Jin Yao <yao.jin@...ux.intel.com>,
        Kan Liang <kan.liang@...ux.intel.com>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Ian Rogers <irogers@...gle.com>,
        John Garry <john.garry@...wei.com>,
        Riccardo Mancini <rickyman7@...il.com>,
        Song Liu <song@...nel.org>,
        Madhavan Srinivasan <maddy@...ux.ibm.com>,
        linux-perf-users@...r.kernel.org,
        "linux-kernel@...r.kernel.org List" <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH 0/1] perf tools: Add 'm' event modifier for counting

On Tue, Jan 11, 2022 at 6:29 AM Jessica Clarke <jrtc27@...c27.com> wrote:
>
> On 11 Jan 2022, at 14:20, Nikita Shubin <nikita.shubin@...uefel.me> wrote:
> >
> > From: Nikita Shubin <n.shubin@...ro.com>
> >
> > This patch is a proposal to add Machine Mode modifier that is currently
> > available only for RISC-V for perf tool.
> >
> > We don't currently have a level that is lower than kernel, so i don't
> > see we can reuse something existing for this purpose.
> >

Thanks for a quick turnaround with a working patch!!

However, the use case can be applied to other arch as well. It would
be good to classify this
as excluding "firmware" events instead of machine mode which is a
RISC-V terminology.
Ofcourse, the current documentation should indicate that this option
is only useful
for RISC-V right now.

I would like to understand if this idea is appealing to the broader community.

> > The exclude_machine bit seems harmless to as no one will proccess it apart
> > of riscv.
>
> Armv8 has equivalent bits in PMEVTYPER<n>_EL0 and PMCCFILTR_EL0 for
> EL-based filtering, which includes filtering EL3.
>
> Jess
>
> > Patch depends on Atish Patra PMU series:
> > https://lwn.net/Articles/879905/
> > + some modifications to pass execlude event to SBI PMU extension
> >
> > Tested with qemu.
> >
> > Nikita Shubin (1):
> >  perf tools: Add 'm' event modifier for counting machine
> >
> > include/uapi/linux/perf_event.h        |  3 ++-
> > tools/include/uapi/linux/perf_event.h  |  3 ++-
> > tools/perf/Documentation/perf-list.txt |  1 +
> > tools/perf/tests/parse-events.c        | 18 ++++++++++++++++++
> > tools/perf/util/evsel.c                |  4 +++-
> > tools/perf/util/parse-events.c         | 18 +++++++++++++-----
> > tools/perf/util/parse-events.l         |  2 +-
> > 7 files changed, 40 insertions(+), 9 deletions(-)
> >
> > --
> > 2.31.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@...ts.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>
>
> _______________________________________________
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> linux-riscv@...ts.infradead.org
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-- 
Regards,
Atish

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