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Message-ID: <4afbaf27-04a9-91a6-f9fa-178e4624b482@gmail.com>
Date: Tue, 11 Jan 2022 16:15:36 +0800
From: Like Xu <like.xu.linux@...il.com>
To: Xiaoyao Li <xiaoyao.li@...el.com>
Cc: Paolo Bonzini <pbonzini@...hat.com>,
Jim Mattson <jmattson@...gle.com>,
Wanpeng Li <wanpengli@...cent.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Joerg Roedel <joro@...tes.org>, x86@...nel.org,
kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
Sean Christopherson <seanjc@...gle.com>
Subject: Re: [PATCH v2] KVM: x86/pt: Ignore all unknown Intel PT capabilities
On 11/1/2022 3:59 pm, Xiaoyao Li wrote:
>>
>> +#define GUEST_SUPPORTED_CPUID_14_EBX \
>> + (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5))
>> +
>> +#define GUEST_SUPPORTED_CPUID_14_ECX \
>> + (BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(31))
>> +
>
> I doubt BIT(3) of CPUID_14_ECX can be exposed to guest directly.
>
> It means "output to Trace Transport Subsystem Supported". If I understand
> correctly, it at least needs passthrough of the said Transport Subsystem or
> emulation of it.
I'm not surprised that we can route Intel Guest PT output to a platform-specific
trace endpoint (e.g., physical or emulated JTAG) as an MMIO debug port.
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